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784c6519de
The nRF5340 application core comes out of reset with its flash cache disabled and nothing in the tree turns it on. nrf53_start() does call nrf53_enable_icache(), but that drives NVMC ICACHECNF and is gated on NRF53_FLASH_PREFETCH, which depends on NRF53_NETCORE -- so it is not even compiled for an application core build. The nRF5340 places the application core cache in a separate CACHE peripheral at 0x50001000. NRF53_CACHE_BASE is already defined in hardware/nrf53_memorymap_cpuapp.h, but there was no register header and no enable. Add both, behind a new NRF53_CACHE option. The option defaults to n, matching ARMV7M_ICACHE and ARMV8M_ICACHE/DCACHE, so that upgrading does not silently change the behaviour of an existing configuration. Measured on nrf5340-dk at 64 MHz with apps/benchmarks/scbench: protected-build syscall round trip 64.1 us -> 29.6 us userspace sem wait + post pair 4.75 us -> 1.95 us Flat builds benefit equally; the gain is on any flash-resident code path. Per the nRF5340 Product Specification, 'CACHE - Instruction and data cache', 'both instruction and data accesses towards flash memory or XIP code regions are cached'. The cache does not observe NVMC programming, so nrf53_flash.c has to account for it: both up_progmem_eraseblock() and up_progmem_write() read back what they just programmed to verify it, and up_progmem_ispageerased() reads a whole page, so lines covering the region being programmed are commonly resident. Bypass the cache for the duration of an erase or a write and invalidate it before re-enabling, so the verify reads the array and later readers do too. That file is built only when NRF53_PROGMEM is selected, which is not the default. Signed-off-by: AlmAck <gluca86@gmail.com> |
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