Ville Juven 9288ed85e7 RISC-V: Add/fix implementation for arch_elf.c ... The jump instruction relocation had an assert that tests for jumps with an offset of 0. This makes it so that a while(1); statement causes an assert because the jump instruction points to the same address, which is perfectly legal. Addend was not handled correctly in several reloc types. Add ADD32/64 + SUB32/64 relocations, for some reason the compiler I use likes to add them.		2022-03-23 17:56:54 +08:00
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arm
renesas
risc-v	RISC-V: Add/fix implementation for arch_elf.c	2022-03-23 17:56:54 +08:00
sim
sparc
x86
xtensa
arch_atomic.c	arch:lib_atomic: remove and fix gcc warning declaration-mismatch	2022-03-18 13:35:42 +08:00
Kconfig
Make.defs