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c36e45eb6f
Wire the RTL8721F (amebagreen2) into the shared Ameba timer driver (arch/arm/src/common/ameba/ameba_timer.c), registered at /dev/timer0 (TIM1) and /dev/timer1 (TIM2). Only the per-chip base addresses, RCC masks and IRQs differ, so this adds a small ameba_timer_chip.h (the two 32-bit basic LTIM timers at 0x40819200 / 0x40819400, 32.768 kHz, APBPeriph_LTIM1/2, IRQ_TIMER1/2, verified against the SoC hal_platform.h / sysreg_lsys.h / vector table) plus the Make.defs/CMakeLists build hooks, the fwlib ram_common/ameba_tim.c RAM source (now also pulled in by CONFIG_AMEBA_TIMER, matching the PWM rule), the board bring-up registration and a timer defconfig. The shared driver is unchanged. TIM0 is left untouched because the boot ROM claims it as the always-on system timer; reprogramming it would break every SDK delay. Assisted-by: Claude <noreply@anthropic.com> Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> |
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