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This commit updates the common-source integration for Xtensa-based Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger common-source update split by architecture for better maintainability. Major components updated: - IRQ allocator refactoring with intr_alloc integration - Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.) - Espressif components upgrade to release/master.b-test - Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.) - Wireless adapters (Wi-Fi and BLE) - esp_timer migration to the common-source path for Xtensa devices - Common-source power management implementation (auto-sleep and wakeup paths) - Board defconfigs for all Xtensa Espressif boards - SMP support improvements for ESP32-S3 - Critical section handling improvements Key architectural changes: - IRQ Allocator: The new interrupt allocator enables multiple mapping options from interrupt sources to CPU interrupts, providing flexibility required by modern peripherals. Although this introduces breaking changes to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE Kconfig option is explicitly checked during startup to ensure proper configuration. This validation prevents runtime issues from configuration mismatches. - Xtensa-specific interrupt handling via esp_xtensa_intr.c providing NuttX-native implementations of xt_ints_on/off and interrupt handlers, avoiding conflicts with NuttX's core Xtensa macros. - Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific RTC/RT-timer code to common-source Espressif integration, including esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates. - Power management consolidation: Xtensa PM follows the common-source implementation, including common-source auto-sleep behavior, UART/Wi-Fi wakeup coordination, and tickless-safe sleep flow compatibility. Note: This is a large commit to maintain bisectability. Breaking the changes into smaller commits would result in non-building intermediate states across the common-source infrastructure update. Tested configurations: - All defconfigs were tested, including `ostest`. Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||