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The CH422G offers eight bi-directional pins, IO0-IO7, and four open-drain
outputs, OC0-OC3. It appears on boards that have run out of usable GPIOs
once a parallel RGB panel has taken its share, the Waveshare
ESP32-S3-Touch-LCD-7 among them, where it holds the panel and touch
controller in and out of reset and switches the backlight.
Two things about the device do not fit the shape a register-per-address
I2C driver usually takes, and both are handled here rather than pushed on
to board logic:
- A register is selected by the I2C address the transfer is addressed
to, not by a register address written ahead of the data. Each access
carries a single byte to one of four addresses.
- None of the write-only registers can be read back, so the driver
keeps a shadow copy of each and updates it in step with the device.
IO0-IO7 have no individual direction control; one bit of the system
parameter register drives the whole group. The driver records the
direction asked of each pin and puts the group in output mode once at
least one of them is an output, which is what a board that drives some of
the pins would expect. Reading a pin of a group held in output mode
reports the value last written, because the hardware cannot report the
level, and that is documented rather than hidden.
The four open-drain outputs are presented as pins 8-11 of the same
ioexpander_dev_s so that one instance covers the chip, which means
CONFIG_IOEXPANDER_NPINS must be at least 12.
Builds clean with no new warnings on esp32s3-touch-lcd7:usbnsh and passes
nxstyle.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Assisted-by: Claude Code
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| audio | ||
| concurrency | ||
| drivers | ||
| filesystem | ||
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| nxgraphics | ||
| tools | ||
| binfmt.rst | ||
| boards.rst | ||
| cmake.rst | ||
| crypto.rst | ||
| index.rst | ||
| nxflat.rst | ||
| openamp.rst | ||
| paging.rst | ||
| syscall.rst | ||
| video.rst | ||
| wireless.rst | ||