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718ae3d2c6
Three fixes to make LPUART1 work as NSH console on Nucleo-L552ZE-Q: 1. stm32l5_lowputc: add LPUART-specific BRR formula (256 * fCK / baud) instead of reusing the standard USART divisor calculation. 2. stm32_boot: enable VDDIO2 and reconfigure LPUART1 GPIOs (PG7/PG8) in board_initialize. The low-level setup runs before VDDIO2 is enabled, so GPIOG writes silently fail. 3. stm32l5_serial: fix LPUART1 apbclock (PCLK1 not PCLK2), add LPUART BRR branch in setformat, cast to uint64_t to prevent 32-bit overflow in (fCK << 8). Also switch nsh defconfig from USART3 to LPUART1, add GPIO_LPUART1 pin definitions in board.h, and update board documentation. Signed-off-by: anjiahao <anjiahao@xiaomi.com> |
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