nuttx/arch/arm64
hujun5 6e80eaf33b arm64: fix tpidr maybe null
Before the MPU initialization, the up_update_task(this_cpu()) function is called at a time when hardware cache coherency is not yet enabled.
In certain critical scenarios, Core 1 reads a zero value for tcb from the global variable g_assignedtask and stores this zero value into the tpidr
register. This results in subsequent interrupt handlers reading a zero tcb, causing an exception.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-28 11:33:28 +08:00
..
include fix nxstyle 2024-12-10 21:57:22 +08:00
src arm64: fix tpidr maybe null 2024-12-28 11:33:28 +08:00
CMakeLists.txt arch/arm64: migrate to SPDX identifier 2024-12-02 22:43:23 +08:00
Kconfig arm64/mte: Add support for arm64 mte 2024-12-02 11:04:11 -03:00