Ville Juven 737dc4fcdd arch/riscv: Implement cpuid mapping ... Implement hartid<->cpuid mapping for RISC-V. This is necessary for some platforms which cannot use 1:1 mapping between logical and physical CPU / core IDs. One example is MPFS where hart0 cannot be used for NuttX SMP as it is a less capable "monitor" core (E51) compared to the application cores hart1...3 (E54). Why not just use a generic offset then? We also need the physical hart ID for many things: - Communication between harts (IPI) - External interrupt acknowledgment (interrupt claim for specific CPU) - Communication to SBI Thus, create procedures that can do this translation: - The default mapping is still logical=physical. - Another flavor is to use the existing CONFIG_ARCH_RV_HARTID_BASE config variable, which is just a simple offset - The final flavor is to overload hartid<->cpuid on a per chip basis (no example for this is provided yet)		2024-10-17 13:43:06 +08:00
..
bl602
bl808	risc-v/bl808: Add watchdog driver	2024-07-27 22:59:23 +08:00
c906
esp32c3	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
esp32c3-legacy	risc-v/esp32c3: Rename legacy approach esp32c3 as esp32c3-legacy	2024-01-30 08:32:05 +01:00
esp32c6	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
esp32h2	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
fe310
hpm6000	Add support for hpm6360evk	2024-02-18 09:17:56 -08:00
hpm6750
jh7110
k210
k230	risc-v/k230: add IPI support to speed up RPTUN/RPMSG	2024-02-21 04:37:03 -08:00
litex	risc-v/litex: fix typo in litex/irq.h	2024-01-06 04:15:52 -08:00
mpfs
qemu-rv
rv32m1
sg2000	arch/risc-v: Add support for SOPHGO SG2000 SoC (T-Head C906)	2024-06-17 09:41:29 +08:00
thead	arch/riscv: add T-HEAD CSR mapping	2024-04-11 22:20:39 +08:00
.gitignore
arch.h	risc-v/arch.h: revising comments	2024-03-25 20:39:24 +08:00
barriers.h
csr.h	arch/risc-v: introduce AIA support	2024-07-31 12:43:04 -03:00
elf.h	arch/risc-v/include/elf.f: Support coredump for rv32 and rv64 targets.	2024-06-18 10:41:56 +08:00
inttypes.h	arch/risc-v: move PRIxREG to inttypes.h	2024-06-22 22:00:06 +08:00
irq.h	arch/riscv: Implement cpuid mapping	2024-10-17 13:43:06 +08:00
limits.h	arch/risc-v: initial qemu-rv64ilp32 support	2024-06-14 19:50:00 +08:00
mode.h	arch/risc-v: introduce AIA support	2024-07-31 12:43:04 -03:00
setjmp.h
spinlock.h	nuttx: fix multiple 'FAR', 'CODE' and style issues	2024-08-25 19:22:15 +08:00
stdarg.h
syscall.h	riscv/syscall: Simplify task/pthread_start logic	2024-10-04 08:33:34 +08:00
types.h	types.h: fix windows build error	2024-08-14 22:36:57 +08:00