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155 lines
4.5 KiB
Text
155 lines
4.5 KiB
Text
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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comment "ARMv7-M Configuration Options"
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config ARMV7M_HAVE_ICACHE
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bool
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default n
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config ARMV7M_HAVE_DCACHE
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bool
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default n
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config ARMV7M_USEBASEPRI
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bool "Use BASEPRI Register"
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default ARCH_HIPRI_INTERRUPT
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depends on ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
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---help---
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Use the BASEPRI register to enable and disable interrupts. By
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default, the PRIMASK register is used for this purpose. This
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usually results in hardfaults when supervisor calls are made.
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Though, these hardfaults are properly handled by the RTOS, the
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hardfaults can confuse some debuggers. With the BASEPRI
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register, these hardfaults, will be avoided. For more details see
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https://cwiki.apache.org/confluence/display/NUTTX/ARMv7-M+Hardfaults%2C+SVCALL%2C+and+Debuggers
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WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you
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MUST select CONFIG_ARMV7M_USEBASEPRI. The Kconfig dependencies
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here will permit to select an invalid configuration because it
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cannot enforce that requirement. If you create this invalid
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configuration, you will encounter some problems that may be
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very difficult to debug.
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config ARMV7M_BASEPRI_WAR
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bool "Cortex-M7 r0p1 Errata 837070 Workaround"
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default n
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depends on ARMV7M_USEBASEPRI && ARCH_CORTEXM7
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---help---
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Enable workaround for r0p1 Errata 837070: Increasing priority using
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write to BASEPRI does not take effect immediately.
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This update is required to be serialized to the instruction stream
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meaning that after this update completes, it takes effect
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immediately and no exceptions of lower priority than the new boosted
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priority can preempt execution. Because of this erratum, the
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priority boosting does not take place immediately, allowing the
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instruction after the MSR to be interrupted by an exception of
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lower priority than the new boosted priority. This effect is only
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limited to the next instruction. Subsequent instructions are
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guaranteed to see the new boosted priority.
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config ARMV7M_ICACHE
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bool "Use I-Cache"
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default n
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depends on ARMV7M_HAVE_ICACHE
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select ARCH_ICACHE
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config ARMV7M_DCACHE
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bool "Use D-Cache"
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default n
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depends on ARMV7M_HAVE_DCACHE
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select ARCH_DCACHE
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config ARMV7M_DCACHE_WRITETHROUGH
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bool "D-Cache Write-Through"
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default n
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depends on ARMV7M_DCACHE
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config ARMV7M_HAVE_ITCM
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bool
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default n
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config ARMV7M_HAVE_DTCM
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bool
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default n
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config ARMV7M_ITCM
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bool "Use ITCM"
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default n
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depends on ARMV7M_HAVE_ITCM
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config ARMV7M_DTCM
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bool "Use DTCM"
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default n
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depends on ARMV7M_HAVE_DTCM
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config ARMV7M_TARGET2_PREL
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bool "R_ARM_TARGET2 is PC relative"
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default CXX_EXCEPTION
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depends on LIBC_ARCH_ELF
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---help---
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Perform a PC relative relocation for relocation type R_ARM_TARGET2
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config ARMV7M_HAVE_STACKCHECK
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bool
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default n
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config ARMV7M_STACKCHECK
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bool "Check for stack overflow on each function call"
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default n
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depends on ARMV7M_HAVE_STACKCHECK
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---help---
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This check uses R10 to check for a stack overflow within each
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function call. This has performances and code size impacts, but it
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will be able to catch hard to find stack overflows.
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Currently only available only for the STM32, SAM3/4 and SAMA5D
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architectures. The changes are not complex and patches for
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other architectures will be accepted.
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This option requires that you are using a GCC toolchain and that
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you also include -finstrument-functions and -ffixed-r10 in your
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CFLAGS when you compile. This addition to your CFLAGS should probably
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be added to the definition of the CFFLAGS in your board Make.defs file.
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config ARMV7M_STACKCHECK_BREAKPOINT
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bool "Breakpoint on stack overflow"
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default n
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depends on ARMV7M_STACKCHECK
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---help---
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If enabled, a hard-coded breakpoint will be inserted to the stack
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overflow trap. This is useful to stop the execution of the program
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and diagnose the issue before the hardfault handler is called (and
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context information is lost).
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config ARMV7M_ITMSYSLOG
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bool "ITM SYSLOG support"
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default n
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select ARCH_SYSLOG
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---help---
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Enable hooks to support ITM syslog output. This requires additional
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MCU support in order to be used. See arch/arm/src/armv7-m/itm_syslog.h
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for additional initialization information.
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if ARMV7M_ITMSYSLOG
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config ARMV7M_ITMSYSLOG_PORT
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int "ITM SYSLOG Port"
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default 0
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range 0 31
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config ARMV7M_ITMSYSLOG_SWODIV
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int "ITM SYSLOG SWO divider"
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default 15
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range 1 8192
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endif # ARMV7M_ITMSYSLOG
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config ARMV7M_SYSTICK
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bool "SysTick timer driver"
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depends on TIMER
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---help---
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Enable SysTick timer driver.
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