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The FIFO watermark flag is a level: it stays high until the worker actually drains the FIFO below the threshold. Configuring INT1 as RISING made that a race the driver could lose permanently. lsm6ds3trc_interrupt() disables its IRQ on entry and re-enables it after the worker has run. With an edge trigger, if the line is still high when the IRQ is re-enabled -- which is precisely what happens whenever a drain does not take the FIFO below the watermark -- there is no new low-to-high transition left to detect, and the line goes mute forever. Observed as a board that serviced exactly one watermark after boot and then never again, reproducible 2 out of 2 reflashes. ONHIGH matches the physical meaning of the pin and is immune to it: a level trigger re-asserts on its own for as long as the condition holds, and the disable/enable pairing around servicing is what stops that from live-locking. Validated with more than 900 consecutive drains (~100 min) including real sleep -> GPIO-wake -> resume transitions, the exact case that used to wedge. Signed-off-by: Felipe Moura <moura.fmo@gmail.com> Assisted-by: Claude:claude-opus-5 |
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| .. | ||
| etc/init.d | ||
| esp32s3_board_adc.c | ||
| esp32s3_board_bmp180.c | ||
| esp32s3_board_i2c.c | ||
| esp32s3_board_i2s.c | ||
| esp32s3_board_ledc.c | ||
| esp32s3_board_lsm6ds3trc.c | ||
| esp32s3_board_mcpwm.c | ||
| esp32s3_board_pcnt.c | ||
| esp32s3_board_rmt.c | ||
| esp32s3_board_sdmmc.c | ||
| esp32s3_board_spidev.c | ||
| esp32s3_board_spiflash.c | ||
| esp32s3_board_spislavedev.c | ||
| esp32s3_board_tim.c | ||
| esp32s3_board_usb.c | ||
| esp32s3_board_wdt.c | ||
| esp32s3_board_wlan.c | ||
| esp32s3_cs4344.c | ||
| esp32s3_es8311.c | ||
| esp32s3_lan9250.c | ||
| esp32s3_qmi8658.c | ||
| esp32s3_usbmsc.c | ||
| Make.defs | ||