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9bfeb92038
Add complete BSP for the N32H762IIL7 (ARM Cortex-M7 @ 600MHz)
from Nations Technologies. The port includes chip-level and
board-level support, peripheral drivers and documentations.
Completed drivers:
GPIO, EXTI, RCC, UART, TIM, PWM, ONESHOT, TICKLESS, DMA,
FLASH (MTD), CAPTURE, USBHS (Device and Host), CORDIC,
SDMMC (ADMA2, FATFS verified), UID.
Not yet ported: I2C, SPI, ADC, WDT, RTC, DAC, CAN/FDCAN, ETH.
Assisted-by: DeepSeek:deepseek-chat
Signed-off-by: JingYue LIAO <felix-liao@my.swjtu.edu.cn>
112 lines
5.3 KiB
C
112 lines
5.3 KiB
C
/****************************************************************************
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* arch/arm/include/n32h7/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_N32H7_CHIP_H
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#define __ARCH_ARM_INCLUDE_N32H7_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* N32H7x3xx Differences between family members:
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*
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* ----------- ---------------- ----- ----
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* SPI
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* PART PACKAGE GPIOs I2S
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* ----------- ---------------- ----- ----
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* N32H762Ix LQFP176 138 7/4
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* ----------- ---------------- ----- ----
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*
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* Parts N32H7xxxI have 2048Kb of FLASH
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*
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* The correct FLASH size will be set CONFIG_N32H7_FLASH_CONFIG_x or
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* overridden with CONFIG_N32H7_FLASH_OVERRIDE_x
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*/
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#if defined (CONFIG_ARCH_CHIP_N32H762II)
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/* Memory */
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# define N32H7_AXI_RAM_SIZE (128*1024) /* Placeholder, actual value to be determined */
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# define N32H7_AHB_RAM_SIZE (352*1024) /* Placeholder, actual value to be determined */
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# if defined(CONFIG_ARMV7M_HAVE_DTCM)
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# define N32H7_DTCM_SRAM_SIZE (1024*1024) /* Assume same as N32H7, adjust as needed */
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# else
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# define N32H7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
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# endif
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# if defined(CONFIG_ARMV7M_HAVE_ITCM)
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# define N32H7_ITCM_SRAM_SIZE (0) /* Assume same as N32H7, adjust as needed */
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# else
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# define N32H7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
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# endif
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/* Peripherals */
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# if defined(CONFIG_N32H7_IO_CONFIG_V)
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# define N32H7_NGPIO (5) /* Placeholder, actual value to be determined */
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# elif defined(CONFIG_N32H7_IO_CONFIG_Z)
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# define N32H7_NGPIO (7) /* Placeholder, actual value to be determined */
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# elif defined(CONFIG_N32H7_IO_CONFIG_I)
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# define N32H7_NGPIO (9) /* Placeholder, actual value to be determined */
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# elif defined(CONFIG_N32H7_IO_CONFIG_X)
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# define N32H7_NGPIO (11) /* Placeholder, actual value to be determined */
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# else
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# error CONFIG_N32H7_IO_CONFIG_x Not Set
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# endif
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# define N32H7_NDMA (3) /* Placeholder, actual value to be determined */
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# define N32H7_NADC (3) /* Placeholder, actual value to be determined */
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# define N32H7_NDAC (2) /* Placeholder, actual value to be determined */
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# define N32H7_NCMP (4) /* Placeholder, actual value to be determined */
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# define N32H7_NFMAC (1) /* Placeholder, actual value to be determined */
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# define N32H7_NUSART (7) /* Placeholder, actual value to be determined */
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# define N32H7_NSPI (7) /* Placeholder, actual value to be determined */
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# define N32H7_NI2S (4) /* Placeholder, actual value to be determined */
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# define N32H7_NUART (7) /* Placeholder, actual value to be determined */
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# define N32H7_NI2C (10) /* Placeholder, actual value to be determined */
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# define N32H7_NCAN (4) /* Placeholder, actual value to be determined */
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# define N32H7_NSDMMC (2) /* Placeholder, actual value to be determined */
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#else
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# error N32 H7 chip not identified
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#endif
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/**
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* @brief Compute TCM configuration value from ITCM/DTCM/AXI sizes (KB).
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* All sizes must be multiples of 128 and sum to 1024 KB.
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* Result matches N32H7 TRM encoding 0x00..0x2C.
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*/
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#define N32H7_TCM_CFG(itcm_kb, dtcm_kb, axi_kb) \
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( ( ( (axi_kb) / 128 ) * (19 - (axi_kb) / 128 ) / 2 ) + \
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( (8 - (axi_kb) / 128) - (itcm_kb) / 128 ) )
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/* 16 Programmable interrupt levels */
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#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
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#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
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#endif /* __ARCH_ARM_INCLUDE_N32H7_CHIP_H */
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