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The documentation grew one page at a time, so the tree follows the
history of who wrote what and not the shape of NuttX. Scheduling is
spread over three places, a driver page can sit above the subsystem
that owns it, and the front page lists everything at the same level.
That is a lot to face when all you want to know is where the scheduler
lives.
This change files every page under the code it describes. It is a move,
not a rewrite: outside the ten pages named below, every page keeps the
text that is already in master, and no page's text is deleted.
What it does:
* Groups the table of contents into nine chapters.
* Moves the OS subsystems under os/: scheduling, memory, drivers,
filesystem, networking, IPC, interrupts, libs, time.
* Renames the platform pages to the names the source tree uses, and
derives their tags from the tree instead of by hand.
* Splits guides/ by subject.
* Adds Documentation/redirects.py, with a rule for every page that left
its old path, so old URLs keep working. The redirect page also carries
a link's #anchor across to the new page.
Ten pages have text that is new or rewritten. Nine of them are the
landing page of a chapter, which has to exist for the new structure:
index the front page
os/index OS Design
os/scheduling/index Scheduling
os/interrupts/index Interrupts
os/ipc/index IPC
os/time/index Time and timers
about/index About
developing/index Developing NuttX
ReleaseNotes/index Release notes
The tenth is os/libs/libbuiltin, the only page here with technical
content: libs/libbuiltin/ had no page at all. Five SVG diagrams come
with these pages, hand-written XML with no editor metadata.
Nothing outside Documentation/ is touched.
How it was checked:
* Sphinx builds with -W: no warnings, and no document left outside a
toctree.
* A script, offered in the PR, proves the narrow claim this rests on.
For every page outside the ten named above it erases what a move
touches -- link target, path, tag line, toctree block, table border --
from the whole old text and the whole new text, and requires the two
to be byte for byte identical. It also requires every sentence of a
deleted page to turn up somewhere, and every page that left its old
path to have a redirect, from a URL that existed, to where its content
went. It exits non-zero and names the page if any of that is not true,
and it tests added pages too, so forgetting to declare one cannot make
it pass.
* An independent audit checked 133 factual claims on these ten pages
against the tree, one shell command per claim: 130 confirmed, 1
refuted and fixed here, 2 not checkable.
* tools/checkpatch.sh is clean over the range.
The diff is large because moving a page changes every link that points
to it. Most of it is pure renames, and board pages that gained one tag
line.
Assisted-by: Claude:claude-opus-5
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45 lines
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=============================
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Per-Thread Interrupt Controls
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=============================
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Using NuttX, you will find that the interrupts enabled/disabled state is not a
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global property. You can not just turn interrupts off and on for all tasks.
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Rather, enabling and disabling interrupts effects only while the single task
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that is controlling the interrupts runs. Consider the following sequence:
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.. code-block:: C
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irqstate_t flags;
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flags = irqsave(); /* Disable interrupts */
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sleep(5); /* Sleep for 5 seconds */
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irqrestore(flags); /* Re-enable interrupts */
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What happens while the task sleeps? Does that mean that interrupts will be
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disabled for five seconds? No, interrupts will (probably) be re-enabled while
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the task is sleeping. How does this work?
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It is really very simple. Each time a context switches occurs, a set of
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registers are saved for the task that is being suspended. Then those registers
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are restored from the previously saved registers for a next task that will run.
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This is why we often describe a context switch as just setjmp/longjmp on steroids:
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A context switch works just like setjmp (save a set of registers) and longjmp
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(restore a set of registers), except that more registers are saved and restored.
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For the ARMv7-M, as an example, you can see the set of registers that are
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stored in ``arch/arm/include/armv7-m/irq.h``
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Among those registers are saved and restore are the register(s) that determine if
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interrupts are enable or not. For the ARMv7-M family that is either the ``PRIMASK``
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register or the ``BASEPRI`` registers. So if a task disables interrupts then suspends,
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the current value of ``PRIMASK``/``BASEPRI`` register is saved and replaced with the
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stored value of the ``PRIMASK``/``BASEPRI`` register for the next task that will run,
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thus re-enabling interrupts while the rist task is suspended.
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So interrupt enabled/disable is a per-thread property, not a global property.
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If you have been working with bare metal systems for a long time, this might seem
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foreign to you.
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By the way, locking the scheduler via ``sched_lock()`` behaves in this same way
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(but the mechanism is a little different).
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