nuttx/arch/arm
raiden00pl a8ac2e74e0 arch/nrf52: add SAADC external TIMER trigger over PPI
The SAADC internal sample timer only works with a single enabled
channel, so hardware-timed multi-channel scan was not possible.  Add
NRF52_SAADC_TIMER_PPI, a third trigger mode in which a general-purpose
TIMER compare event is routed to TASKS_SAMPLE over PPI.  All enabled
channels are scanned, and the TIMER prescaler allows much lower sample
rates than the internal timer, which is limited to 16MHz/CC with CC in
80..2047.

NRF52_SAADC_CONTINUOUS is no longer tied to the internal timer and
works with either source.  Its EasyDMA buffers now hold
NRF52_SAADC_CONTINUOUS_BUFLEN whole scans rather than that many single
samples, so MAXCNT becomes chan_len * BUFLEN.  Samples are interleaved
scan by scan, so a channel map is built once at configure() time and
passed to the upper half with the batch; the upper half already accepts
a per-sample channel array.  A single-channel configuration produces
the same MAXCNT and the same delivery as before.

Because both features want a PPI channel, add a build-time check that
NRF52_SAADC_PPI_CHANNEL and NRF52_SAADC_CONTINUOUS_PPI_CH differ, and
constrain the latter under the SoftDevice controller like the former.

NRF52_SAADC_CHANNELS gains a default and range for the new mode, and
documents that the internal timer is restricted to one channel.

Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
2026-09-28 11:20:31 +02:00
..
include arch/arm/rtl8730e: add UART character driver support 2026-09-24 21:24:35 +08:00
src arch/nrf52: add SAADC external TIMER trigger over PPI 2026-09-28 11:20:31 +02:00
CMakeLists.txt arch/arm: migrate to SPDX identifier 2024-12-06 09:25:23 +08:00
Kconfig arm/nrf54l: add initial nrf54l support 2026-09-24 11:10:46 +08:00