mirror of
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7298977894
Most of the peripheral support matches litex vexriscv-smp. * arch/risc-v/Kconfig: Defer RV32 selection to core as litex board can do RV64. * arch/risc-v/src/litex/Make.defs arch/risc-v/src/litex/hardware/litex_clint.h arch/risc-v/src/litex/hardware/litex_memorymap.h arch/risc-v/src/litex/hardware/litex_plic.h arch/risc-v/src/litex/litex_irq.c arch/risc-v/src/litex/litex_irq_dispatch.c: Add CONFIG_LITEX_CORE_VEXIIRISCV conditional where vexriscv_smp conditionals are. * boards/risc-v/litex/arty_a7/configs/nsh-vexii/defconfig: New config. * boards/risc-v/litex/arty_a7/include/vexii_irq.h: vexiiriscv irq defintion. * boards/risc-v/litex/arty_a7/include/vexii_memorymap.h: vexiiriscv memory map. * boards/risc-v/litex/arty_a7/scripts/ld.script: Define __global_pointer for toolchain happiness matching other RISC-V linker scripts. (This commit was written with assistance from Claude Code.) Signed-off-by: Justin Erenkrantz <justin@erenkrantz.com>
98 lines
2.9 KiB
Text
98 lines
2.9 KiB
Text
/****************************************************************************
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* boards/risc-v/litex/arty_a7/scripts/ld.script
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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MEMORY
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{
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progmem (rx) : ORIGIN = 0x40000000, LENGTH = 8M
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sram (rwx) : ORIGIN = 0x40800000, LENGTH = 256M - 8M
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}
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OUTPUT_ARCH("riscv")
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ENTRY(_stext)
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EXTERN(_vectors)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.* .srodata .srodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > progmem
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.init_section : ALIGN(4) {
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_sinit = ABSOLUTE(.);
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KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) .ctors))
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_einit = ABSOLUTE(.);
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} > progmem
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_eronly = ABSOLUTE(.);
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.data : ALIGN(4) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.sdata .sdata.* .sdata2.*)
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*(.gnu.linkonce.d.*)
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*(.gnu.linkonce.s.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > progmem
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PROVIDE(__global_pointer$ = _sdata + ((_edata - _sdata) / 2));
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.bss : ALIGN(4) {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.sbss .sbss.*)
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*(.gnu.linkonce.b.*)
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*(.gnu.linkonce.sb.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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