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This PR adds support for the Allwinner A527 Arm64 SoC. This will be used by the upcoming port of NuttX for PINE64 Yuzuki Avaota-A1 SBC. Most of the code was derived from NuttX for QEMU Arm64 Kernel Build qemu-armv8a:knsh. The modified code is explained here: https://lupyuen.github.io/articles/avaota#appendix-port-nuttx-to-avaota-a1 Modified Files in arch/arm64: Kconfig: Added ARCH_CHIP_SUNXI for Allwinner 64-bit SoCs. Added ARCH_CHIP_SUNXI_A527 for A527 SoC. New Files in arch/arm64: include/a527/chip.h: A527 Definitions include/a527/irq.h: External Interrupts src/a527/chip.h: Memory Map src/a527/a527_boot.c, a527_boot.h: Startup Code src/a527/a527_initialize.c: Power Management src/a527/a527_lowputc.S: UART Output src/a527/a527_serial.c: Serial Driver src/a527/a527_textheap.c: Text Heap src/a527/a527_timer.c: A527 Timer src/a527/Kconfig: A527 Config src/a527/Make.defs, CMakeLists.txt: Makefiles Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
42 lines
1.6 KiB
C
42 lines
1.6 KiB
C
/****************************************************************************
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* arch/arm64/include/a527/irq.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM64_INCLUDE_A527_IRQ_H
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#define __ARCH_ARM64_INCLUDE_A527_IRQ_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Total number of interrupts */
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#define NR_IRQS 220
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/* Map CPU MPID to Core ID */
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#define MPID_TO_CORE(mpid) (((mpid) >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)
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#endif /* __ARCH_ARM64_INCLUDE_A527_IRQ_H */
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