nuttx/arch/arm/include/armv7-m/nvicpri.h
hujun5 0e1b432dd0 armv7/8m: fix regresion from https://github.com/apache/nuttx/pull/14881
reason:
svc call may trigger hardfault

Background
    The origin of this issue is our desire to eliminate the function of storing
"regs" in g_current_regs and instead utilize (*running_task)->xcp.regs for storage.
The benefits of this approach include faster storage speed and
avoiding multiple accesses to g_current_regs during context switching,
thus ensuring that whether returning from an interrupt or an exception,
we consistently use this_task()->xcp.regs

Issue Encountered
    However, when storing registers, we must ensure that (running_task)->xcp.regs is invalid
so that it can be safely overwritten.
According to the existing logic, the only scenario where (running_task)->xcp.regs
is valid is during restore_context. We must accurately identify this scenario.
Initially, we used the condition (running_task)==NULL for this purpose, but we deemed
this approach unsatisfactory as it did not align well with the actual logic.
(running_task) should not be NULL. Consequently, we adopted other arch-specific methods for judgment,
but due to special logic in some arch, the judgment was not accurate, leading to this issue.

Solution:
    For armv6-m, we haven't found a more suitable solution, so we are sticking with (*running_task)==NULL.
    For armv7-m/armv8-m, by removing support for primask, we can achieve accurate judgment.

    PRIMASK is a design in armv6-m, that's why arm introduce BASEPRI from armv7-m.
It's wrong to provide this option for armv7-m/armv8-m arch.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-09 12:20:13 +08:00

78 lines
3.7 KiB
C

/****************************************************************************
* arch/arm/include/armv7-m/nvicpri.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/chip/chip.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* In the normal cases, interrupts are not nest-able and all interrupts run
* at an execution priority between NVIC_SYSH_PRIORITY_MIN and
* NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for SVCall).
*
* If, in addition, CONFIG_ARCH_HIPRI_INTERRUPT is defined, then special
* high priority interrupts are supported. These are not "nested" in the
* normal sense of the word. These high priority interrupts can interrupt
* normal processing but execute outside of OS (although they can "get back
* into the game" via a PendSV interrupt).
*
* In the normal course of things, interrupts must occasionally be disabled
* using the up_irq_save() inline function to prevent contention in use of
* resources that may be shared between interrupt level and non-interrupt
* level logic. Now the question arises, if we are using
* CONFIG_ARCH_HIPRI_INTERRUPT=y, do we disable all interrupts except
* SVCall (we cannot disable SVCall interrupts). Or do we only disable the
* "normal" interrupts?
*
* If we are using the BASEPRI register to disable interrupts, then the
* answer is that we must disable ONLY the "normal interrupts". That
* is because we cannot disable SVCALL interrupts and we cannot permit
* SVCAll interrupts running at a higher priority than the high priority
* interrupts (otherwise, they will introduce jitter in the high priority
* interrupt response time.)
*
* Hence, if you need to disable the high priority interrupt, you will have
* to disable the interrupt either at the peripheral that generates the
* interrupt or at the NVIC. Disabling global interrupts via the BASEPRI
* register cannot effect high priority interrupts.
*/
/* The high priority interrupt must be highest priority. This prevents
* SVCALL handling from adding jitter to high priority interrupt response.
* Disabling interrupts will disable all interrupts EXCEPT SVCALL and the
* high priority interrupts.
*/
#define NVIC_SYSH_MAXNORMAL_PRIORITY NVIC_SYSH_PRIORITY_DEFAULT
#define NVIC_SYSH_HIGH_PRIORITY (NVIC_SYSH_PRIORITY_DEFAULT - 2*NVIC_SYSH_PRIORITY_STEP)
#define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_PRIORITY_DEFAULT
#define NVIC_SYSH_SVCALL_PRIORITY (NVIC_SYSH_PRIORITY_DEFAULT - 1*NVIC_SYSH_PRIORITY_STEP)
#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H */