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Introduce a single configuration option to provide strict transmit priority ordering based on CAN ID. The intention is to expose the user-visible behavior (strict TX priority ordering) rather than the underlying implementation details. Strict priority ordering is only meaningful when hardware transmit buffer cancellation is available, so splitting this functionality into separate configuration options was misleading and could result in partially effective or incorrect configurations. Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
111 lines
5.6 KiB
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111 lines
5.6 KiB
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===========
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CAN Drivers
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===========
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NuttX supports character device CAN a very low-level CAN driver and
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SocketCAN as a more high level (and more overhead) option.
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This driver supports only the data exchange and does not include any
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high-level CAN protocol. The NuttX CAN driver is split into two
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parts:
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#. An "upper half", generic driver that provides the common CAN
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interface to application level code, and
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#. A "lower half", platform-specific driver that implements the
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low-level timer controls to implement the CAN functionality.
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Files supporting CAN can be found in the following locations:
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- **Interface Definition**. The header file for the NuttX CAN
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driver resides at ``include/nuttx/can/can.h``. This header file
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includes both the application level interface to the CAN driver
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as well as the interface between the "upper half" and "lower
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half" drivers. The CAN module uses a standard character driver
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framework.
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- **"Upper Half" Driver**. The generic, "upper half" CAN driver
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resides at ``drivers/can.c``.
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- **"Lower Half" Drivers**. Platform-specific CAN drivers reside
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in ``arch/<architecture>/src/<hardware>``
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directory for the specific processor ``<architecture>`` and for
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the specific ``<chip>`` CAN peripheral devices.
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``struct timeval ch_ts``: This member variable that store in the
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``can_hdr_s`` structure depends on ``CONFIG_CAN_TIMESTAMP`` and
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is used to store the timestamp of the CAN message.
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The upper half driver supports the following ``ioctl`` commands:
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- **CANIOC_RTR**: Send the given message (passed as ``ioctl`` argument) as a
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remote request. On successful return, the passed message structure is updated
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with the contents of the received message; i.e. the message ID and the
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standard/extended ID indication bit stay the same, but the DLC and data bits
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are updated with the contents of the received message. If no response is
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received after the specified timeout, ioctl will return.
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- **CANIOC_GET_BITTIMING**: Return the current bit timing settings.
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- **CANIOC_SET_BITTIMING**: Set new current bit timing values.
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- **CANIOC_ADD_STDFILTER**: Add an address filter for a standard 11 bit address.
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- **CANIOC_ADD_EXTFILTER**: Add an address filter for a extended 29 bit address.
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- **CANIOC_DEL_STDFILTER**: Remove an address filter for a standard 11 bit
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address.
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- **CANIOC_DEL_EXTFILTER**: Remove an address filter for a standard 29 bit
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address.
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- **CANIOC_GET_CONNMODES**: Get the current bus connection modes.
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- **CANIOC_SET_CONNMODES**: Set new bus connection modes values.
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- **CANIOC_BUSOFF_RECOVERY**: Initiates the BUS-OFF recovery sequence.
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- **CANIOC_SET_NART**: Enable/Disable NART (No Automatic Retry).
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- **CANIOC_SET_ABOM**: Enable/Disable ABOM (Automatic Bus-off Management).
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- **CANIOC_IFLUSH**: Flush data received but not read.
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- **CANIOC_OFLUSH**: Flush data written but not transmitted.
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- **CANIOC_IOFLUSH**: Flush data received but not read and data written but not
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transmitted.
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- **CANIOC_SET_STATE**: Set specific can controller state.
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- **CANIOC_GET_STATE**: Get specific can controller state.
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- **CANIOC_SET_TRANSVSTATE**: Set specific can transceiver state.
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- **CANIOC_GET_TRANSVSTATE**: Get specific can transceiver state.
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- **CANIOC_SET_MSGALIGN**: Set messages alignment. Read and written messages can
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be configured to be aligned to multiple of given bytes by this. The default
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value is 1. The alignment affects both read and write operation. The value 0
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has a special meaning where write behaves the same way as with 1, but read
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will always provide only a single message.
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- **CANIOC_GET_MSGALIGN**: Get messages alignment. See CANIOC_SET_MSGALIGN for
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explanation.
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The upper half driver supports the **strict TX priority ordering**:
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- When the CAN controller hardware supports cancelling an ongoing transmission
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from a hardware transmit buffer, the following transmit-cancel mechanism can
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be used to avoid priority inversion when all hardware transmit buffers are
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full.
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- **Behavior**: When the hardware transmit buffers are full and there are
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frames queued in the software tx_pending list, the driver compares the
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highest-priority frame in the software tx_pending list with the
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highest-priority frame currently resident in hardware. If the highest-priority
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pending frame has a higher priority than the highest-priority hardware-resident
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frame, the driver will:
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- Cancel the transmission of the lowest-priority frame currently in the hardware
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transmit buffers (the controller must support cancellation).
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- Reinsert that cancelled frame back into the software tx_pending list at the
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appropriate position.
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- Fill the freed hardware transmit buffer with the higher-priority frame taken
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from the software tx_pending list.
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This mechanism helps prevent priority inversion when all hardware transmit buffers
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are full, by ensuring that the highest-priority frame is always transmitted first.
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- **Note**: The "hardware transmit buffer" in this context refers to individual H/W
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transmit message buffers and not to a hardware FIFO.
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- **Requirements**:
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- The CAN controller must support cancellation of an ongoing buffered transmission.
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- The driver implementation (upper half / lower half) must cooperate with the cancel
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operation and correctly manage the tx_pending and tx_sending lists.
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- The feature should be enabled via a configuration option(``CONFIG_CAN_STRICT_TX_PRIORITY``).
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**Usage Note**: The default behavior of the upper half driver is to return
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multiple messages on ``read``. See the `guide on this subject
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</guides/reading_can_msgs.html>`_.
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**Examples**: ``drivers/can/mcp2515.c``.
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