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nuttx/arch/xtensa/src/common
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Tiago Medicci Serrano 869aee6a78 xtensa/sigdeliver: fix signal deliver when task is running 
The Inter-Processor Interrupt that pauses the other CPU generates
a level-1 interrupt which sets the PS.EXCM. This level-1 interrupt
is treated as an Exception and the bit PS.EXCM bit is automatically
reset on return from Exception. However, this is not the case here
because we are changing the execution to the signal trampoline.
Restoring the PS register with the PS.EXCM bit set would cause any
other exception to deviate execution to the DEC (double exception
vector), avoiding it to be treated correctly. According to the
xtensa ISA: "The process of taking an interrupt does not clear
the interrupt request. The process does set PS.EXCM to 1, which
disables level-1 interrupts in the interrupt handler. Typically,
the PS.EXCM is reset to 0 by the handler, after it has set up the
stack frame and masked the interrupt." Clean the saved PS.EXCM to
1) avoid an exception from being properly treated and 2) avoid
interrupts to be masked while delivering the signal.
2023-04-15 08:19:30 +09:00
..
Make.defs xtensa/esp32: Move attribution to CMN_ASRCS to common makefile 2023-03-04 12:56:58 +08:00
mpu.h
xtensa.h arch: save user context in assert common code 2022-12-24 13:02:56 +08:00
xtensa_asm_utils.h xtensa_context.S: Use Zephyr's version of spilling the window register 2022-03-14 11:12:35 +08:00
xtensa_assert.c arch: save user context in assert common code 2022-12-24 13:02:56 +08:00
xtensa_attr.h
xtensa_backtrace.c backtrace: use CURRENT_REGS when in interrupt context 2023-01-29 02:48:00 -08:00
xtensa_cache.c cache: add up_get_xcache_linesize() support 2023-03-20 17:17:22 +08:00
xtensa_checkstack.c arch: Remove the unused arch color function variant 2022-12-24 22:40:52 +02:00
xtensa_context.S xtensa: Save SCOMPARE1 on context switches 2022-10-21 11:10:51 +08:00
xtensa_coproc.S xtensa: Fix allocation of FPU registers in exception context 2022-08-26 11:57:06 +08:00
xtensa_counter.h
xtensa_cpenable.c arch:xtensa: remove struct xtensa_cpstate_s as no need used 2022-05-13 15:28:45 +02:00
xtensa_cpuint.S arch/xtensa: Use rsync around manipulating interrupt registers and 2022-03-11 02:23:09 +02:00
xtensa_cpupause.c xtensa: Remove old references to co-processors. 2022-06-15 22:06:08 +03:00
xtensa_createstack.c arch: fixed error in the calculation of nwords caused an out of bounds 2023-03-13 16:12:11 +09:00
xtensa_dispatch_syscall.S xtensa: Implement syscalls required for Protected Mode 2022-05-14 21:38:12 +08:00
xtensa_exit.c arch:xtensa: modify xtensa_context_save/restore function 2022-05-13 15:28:45 +02:00
xtensa_fpucmp.c xtensa: Refactor up_fpucmp to only consider enabled coprocessors 2022-08-26 11:57:06 +08:00
xtensa_getintstack.c arch: move stack and task dump to common code 2022-12-17 01:59:35 +08:00
xtensa_hostfs.c fs/hostfs: mode_t of mkdir(2) should use the nuttx prototype 2022-12-13 18:16:20 +08:00
xtensa_idle.c
xtensa_initialize.c arch: rename arch special function name 2022-11-22 16:27:56 +08:00
xtensa_initialstate.c xtensa: move fpu register to XCPTCONTEXT_REGS 2022-05-13 15:28:45 +02:00
xtensa_int_handlers.S xtensa/common: Fix Xtensa interrupt stack context restore issue 2023-02-28 16:36:55 -03:00
xtensa_irqdispatch.c group_addrenv: Fix call to group_addrenv for targets that don't need it 2023-02-09 00:14:52 +08:00
xtensa_loadstore.S
xtensa_lowputs.c arch: rename arch special function name 2022-11-22 16:27:56 +08:00
xtensa_macros.S xtensa/esp32s3: Configure the PMS peripheral for Protected Mode 2022-12-07 03:07:45 +08:00
xtensa_mdelay.c
xtensa_mm.h
xtensa_modifyreg8.c
xtensa_modifyreg16.c
xtensa_modifyreg32.c
xtensa_mpu.c Typo fixes. 2023-02-17 11:17:11 -03:00
xtensa_nputs.c up_nputs: fix AddressSanitizer: global-buffer-overflow problem 2022-09-01 11:51:48 +08:00
xtensa_oneshot.c xtensa: add xtensa arch oneshot ops 2022-03-28 22:55:00 +08:00
xtensa_panic.S Remove the tail spaces from all files except Documentation 2023-02-26 13:24:24 -08:00
xtensa_perf.c arch/arm64: the arm64 perf interface supports pmu 2023-04-10 16:23:49 -03:00
xtensa_pthread_start.c xtensa: Implement syscalls required for Protected Mode 2022-05-14 21:38:12 +08:00
xtensa_registerdump.c arch: save user context in assert common code 2022-12-24 13:02:56 +08:00
xtensa_releasestack.c
xtensa_saveusercontext.c arch/xtensa: Move xtensa_save_context to up_saveusercontext for 2022-04-21 01:59:34 +08:00
xtensa_schedsigaction.c xtensa/sigdeliver: fix signal deliver when task is running 2023-04-15 08:19:30 +09:00
xtensa_sigdeliver.c xtensa: Remove old references to co-processors. 2022-06-15 22:06:08 +03:00
xtensa_signal_dispatch.c xtensa: Implement syscalls required for Protected Mode 2022-05-14 21:38:12 +08:00
xtensa_signal_handler.S xtensa: Implement syscalls required for Protected Mode 2022-05-14 21:38:12 +08:00
xtensa_simcall.S
xtensa_stackframe.c arch: Move STACK_ALIGNMENT definition to up_internal.h 2022-02-28 15:05:41 +08:00
xtensa_swint.c arch: save user context in assert common code 2022-12-24 13:02:56 +08:00
xtensa_switchcontext.c nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
xtensa_task_start.c xtensa: Implement syscalls required for Protected Mode 2022-05-14 21:38:12 +08:00
xtensa_tcbinfo.c arch:change tcbinfo regs num 2023-01-05 23:36:12 +08:00
xtensa_testset.c
xtensa_timer.h arch:xtena: modify timer interrupt level large to XCHAL_IRQ_LEVEL level. 2023-02-01 14:04:44 +08:00
xtensa_udelay.c
xtensa_user_handler.S arch/xtensa: Move the new saving area directly to A2. 2022-06-15 18:07:51 +03:00
xtensa_usestack.c arch: Move STACK_ALIGNMENT definition to up_internal.h 2022-02-28 15:05:41 +08:00
xtensa_vectors.S Typo fixes. 2023-02-17 11:17:11 -03:00
xtensa_window_vector.S xtensa/esp32s3: Configure the PMS peripheral for Protected Mode 2022-12-07 03:07:45 +08:00
xtensa_windowspill.S