Ricardo Maurizio Paul 7e3d6066df arch/arm/stm32h5: start the ICACHE from a clean state and bound its waits. ... A bootloader may hand over with the ICACHE enabled, and nothing waits for the invalidate that runs when the ICACHE is disabled. The driver also polled BUSYF without a bound, so a stuck flag would hang the boot, and it ignored an invalidate that never finished. - stm32_enable_icache(): on first use, disable and invalidate the ICACHE before the associativity and region registers are written (they are only writable while EN=0), and wait for any pending invalidate before enabling it (RM0481 8.4.5). - stm32_disable_icache(): wait for the invalidate that EN=0 starts and clear BSYENDF and ERRF. - Bound every BUSYF wait with STM32_ICACHE_BUSY_TIMEOUT. RM0481 gives no invalidate duration, so the value is a margin, not a measured limit. - stm32_enable_icache() now returns OK or -ETIMEDOUT instead of void. On a timeout the ICACHE is left disabled: with BUSYF stuck it would not cache anything anyway (RM0481 8.4.5). Existing callers ignore the result and keep working. - __start: when CONFIG_STM32_ICACHE is not set, disable an ICACHE left on by a bootloader, so reads of the OTP and UID cannot fault. On an STM32H563 with the ICACHE left enabled this way, a 16-bit read of the UID raised a precise bus fault and up_progmem_write() failed its read-back check with -EIO. Assisted-by: Claude:claude-sonnet-5-5 Signed-off-by: Ricardo Maurizio Paul <ricardopaul@geotab.com>		2026-10-06 16:57:31 -03:00
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include	arch/arm/ra8m1: Add GPT timer support	2026-10-01 23:12:10 +08:00
src	arch/arm/stm32h5: start the ICACHE from a clean state and bound its waits.	2026-10-06 16:57:31 -03:00
CMakeLists.txt
Kconfig	arch/arm/ra8m1: Add DTC and per-instance SCI FIFO/DTC/termios support	2026-10-06 16:56:58 -03:00