mirror of
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This commit updates the common-source integration for Xtensa-based Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger common-source update split by architecture for better maintainability. Major components updated: - IRQ allocator refactoring with intr_alloc integration - Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.) - Espressif components upgrade to release/master.b-test - Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.) - Wireless adapters (Wi-Fi and BLE) - esp_timer migration to the common-source path for Xtensa devices - Common-source power management implementation (auto-sleep and wakeup paths) - Board defconfigs for all Xtensa Espressif boards - SMP support improvements for ESP32-S3 - Critical section handling improvements Key architectural changes: - IRQ Allocator: The new interrupt allocator enables multiple mapping options from interrupt sources to CPU interrupts, providing flexibility required by modern peripherals. Although this introduces breaking changes to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE Kconfig option is explicitly checked during startup to ensure proper configuration. This validation prevents runtime issues from configuration mismatches. - Xtensa-specific interrupt handling via esp_xtensa_intr.c providing NuttX-native implementations of xt_ints_on/off and interrupt handlers, avoiding conflicts with NuttX's core Xtensa macros. - Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific RTC/RT-timer code to common-source Espressif integration, including esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates. - Power management consolidation: Xtensa PM follows the common-source implementation, including common-source auto-sleep behavior, UART/Wi-Fi wakeup coordination, and tickless-safe sleep flow compatibility. Note: This is a large commit to maintain bisectability. Breaking the changes into smaller commits would result in non-building intermediate states across the common-source infrastructure update. Tested configurations: - All defconfigs were tested, including `ostest`. Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
451 lines
14 KiB
Text
451 lines
14 KiB
Text
/****************************************************************************
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* boards/xtensa/esp32/common/scripts/kernel-space.ld
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Provide these so there is no need for using config files for this */
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__uirom_start = ORIGIN(UIROM);
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__uirom_size = LENGTH(UIROM);
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__uirom_end = ORIGIN(UIROM) + LENGTH(UIROM);
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__udrom_start = ORIGIN(UDROM);
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__udrom_size = LENGTH(UDROM);
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__udrom_end = ORIGIN(UDROM) + LENGTH(UDROM);
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__uiram_start = ORIGIN(UIRAM);
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__uiram_size = LENGTH(UIRAM);
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__uiram_end = ORIGIN(UIRAM) + LENGTH(UIRAM);
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__udram_start = ORIGIN(UDRAM);
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__udram_size = LENGTH(UDRAM);
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__udram_end = ORIGIN(UDRAM) + LENGTH(UDRAM);
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/* Provide the kernel boundaries as well */
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__kirom_start = ORIGIN(KIROM);
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__kirom_size = LENGTH(KIROM);
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__kdrom_start = ORIGIN(KDROM);
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__kdrom_size = LENGTH(KDROM);
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__kdrom_start = ORIGIN(KDROM);
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__kdrom_size = LENGTH(KDROM);
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__kiram_0_start = ORIGIN(KIRAM_0);
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__kiram_0_size = LENGTH(KIRAM_0);
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__kiram_0_end = ORIGIN(KIRAM_0) + LENGTH(KIRAM_0);
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__kiram_1_start = ORIGIN(KIRAM_1);
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__kiram_1_size = LENGTH(KIRAM_1);
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__kiram_1_end = ORIGIN(KIRAM_1) + LENGTH(KIRAM_1);
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__kdram_0_start = ORIGIN(KDRAM_0);
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__kdram_0_size = LENGTH(KDRAM_0);
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__kdram_0_end = ORIGIN(KDRAM_0) + LENGTH(KDRAM_0);
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__kdram_1_start = ORIGIN(KDRAM_1);
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__kdram_1_size = LENGTH(KDRAM_1);
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__kdram_1_end = ORIGIN(KDRAM_1) + LENGTH(KDRAM_1);
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/* Heap ends at top of dram0_0_seg */
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_eheap = 0x40000000;
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ENTRY(_stext)
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SECTIONS
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{
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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/* Vectors go to IRAM */
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_init_start = ABSOLUTE(.);
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__vectors_start = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP (*(.window_vectors.text));
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. = 0x180;
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KEEP (*(.xtensa_level2_vector.text));
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. = 0x1c0;
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KEEP (*(.xtensa_level3_vector.text));
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. = 0x200;
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KEEP (*(.xtensa_level4_vector.text));
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. = 0x240;
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KEEP (*(.xtensa_level5_vector.text));
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. = 0x280;
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KEEP (*(.debug_exception_vector.text));
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. = 0x2c0;
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KEEP (*(.nmi_vector.text));
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. = 0x300;
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KEEP (*(.kernel_exception_vector.text));
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. = 0x340;
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KEEP (*(.user_exception_vector.text));
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. = 0x3c0;
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KEEP (*(.double_exception_vector.text));
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. = 0x400;
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*(.*_vector.literal)
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. = ALIGN (16);
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__vectors_end = ABSOLUTE(.);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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} >KIRAM_0
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.iram0.text :
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{
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libkarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
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*libkarch.a:*esp_clk.*(.text .text.* .literal .literal.*)
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*libkarch.a:xtensa_cpupause.*(.literal .text .literal.* .text.*)
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*libkarch.a:xtensa_copystate.*(.literal .text .literal.* .text.*)
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*libkarch.a:xtensa_interruptcontext.*(.literal .text .literal.* .text.*)
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*libkarch.a:xtensa_testset.*(.literal .text .literal.* .text.*)
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*libkarch.a:esp_app_desc.*(.literal .text .literal.* .text.*)
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*libc.a:arch_atomic.*(.literal .text .literal.* .text.*)
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*libsched.a:sched_suspendscheduler.*(.literal .text .literal.* .text.*)
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*libsched.a:sched_note.*(.literal .text .literal.* .text.*)
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*libsched.a:sched_thistask.*(.literal .text .literal.* .text.*)
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*libsched.a:spinlock.*(.literal .text .literal.* .text.*)
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*libsched.a:irq_csection.*(.literal .text .literal.* .text.*)
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*libsched.a:irq_dispatch.*(.literal .text .literal.* .text.*)
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*libkarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
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*libkarch.a:esp_flash_api.*(.text .text.* .literal .literal.*)
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*libkarch.a:esp_flash_spi_init.*(.text .text.* .literal .literal.*)
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*libkarch.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
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*libkarch.a:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*)
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*libkarch.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
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*libkarch.a:spi_flash_chip*.*(.literal .literal.* .text .text.*)
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*libkarch.a:spi_flash_wrap.*(.literal .literal.* .text .text.*)
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*libkarch.a:spi_flash_os_func_noos.*(.literal .literal.* .text .text.*)
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*libkarch.a:spi_flash_os_func_app.*(.literal .literal.* .text .text.*)
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*libkarch.a:flash_brownout_hook.*(.literal .literal.* .text .text.*)
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*libkarch.a:esp_cache_utils.*(.literal .literal.* .text .text.*)
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*libkarch.a:cache_esp32.*(.literal .literal.* .text .text.*)
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*libkarch.a:cache_hal_esp32.*(.literal .literal.* .text .text.*)
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*libkarch.a:cache_utils.*(.literal .literal.* .text .text.*)
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*libkarch.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
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*libkarch.a:critical_section.*(.literal .literal.* .text .text.*)
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*libkarch.a:os.*(.literal.nuttx_enter_critical .text.nuttx_enter_critical)
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*libkarch.a:os.*(.literal.nuttx_exit_critical .text.nuttx_exit_critical)
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*libkarch.a:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno)
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*libkarch.a:intr_alloc.*(.literal.esp_intr_get_cpu .text.esp_intr_get_cpu)
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*libkarch.a:interrupt.*(.literal.intr_handler_get .text.intr_handler_get)
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*libkarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
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*libkarch.a:interrupt.*(.literal.intr_get_item .text.intr_get_item)
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*libkarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
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*(.wifirxiram .wifirxiram.*)
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*(.wifi0iram .wifi0iram.*)
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*(.wifislpiram .wifislpiram.*)
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*(.wifislprxiram .wifislprxiram.*)
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*(.phyiram .phyiram.*)
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_iram_text_end = ABSOLUTE(.);
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/* IRAM heap starts at the end of iram0_0_seg */
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. = ALIGN (4);
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_siramheap = ABSOLUTE(.);
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} >KIRAM_1
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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/* .bss initialized on power-up */
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. = ALIGN (8);
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_sbss = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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*(.ext_ram.bss*)
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_bt_bss_start = ABSOLUTE(.);
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*libbt.a:(.bss .bss.* COMMON)
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. = ALIGN (4);
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_bt_bss_end = ABSOLUTE(.);
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_btdm_bss_start = ABSOLUTE(.);
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*libbtdm_app.a:(.bss .bss.* COMMON)
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. = ALIGN (4);
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_btdm_bss_end = ABSOLUTE(.);
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. = ALIGN (8);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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KEEP (*(.bss))
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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*libkarch.a:esp_spiflash.*(.bss .bss.* COMMON)
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*libkarch.a:xtensa_cpupause.*(.bss .bss.* COMMON)
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*libkarch.a:xtensa_copystate.*(.bss .bss.* COMMON)
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*libkarch.a:xtensa_interruptcontext.*(.bss .bss.* COMMON)
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*libkarch.a:xtensa_testset.*(.bss .bss.* COMMON)
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*libsched.a:sched_suspendscheduler.*(.bss .bss.* COMMON)
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*libsched.a:sched_thistask.*(.bss .bss.* COMMON)
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*libsched.a:sched_note.*(.bss .bss.* COMMON)
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*libsched.a:spinlock.*(.bss .bss.* COMMON)
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*libsched.a:irq_csection.*(.bss .bss.* COMMON)
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*libsched.a:irq_dispatch.*(.bss .bss.* COMMON)
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. = ALIGN(8);
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_bss_end = ABSOLUTE(.);
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_ebss = ABSOLUTE(.);
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} >KDRAM_0
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.noinit (NOLOAD):
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{
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/* This section contains data that is not initialized during load,
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* or during the application's initialization sequence.
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*/
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*(.noinit)
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} >KDRAM_0
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.dram0.data :
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{
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/* .data initialized on power-up in ROMed configurations. */
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_sdata = ABSOLUTE(.);
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_bt_data_start = ABSOLUTE(.);
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*libbt.a:(.data .data.*)
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. = ALIGN (4);
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_bt_data_end = ABSOLUTE(.);
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_btdm_data_start = ABSOLUTE(.);
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*libbtdm_app.a:(.data .data.*)
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. = ALIGN (4);
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_btdm_data_end = ABSOLUTE(.);
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KEEP (*(.data))
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KEEP (*(.data.*))
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KEEP (*(.gnu.linkonce.d.*))
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KEEP (*(.data1))
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KEEP (*(.sdata))
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KEEP (*(.sdata.*))
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KEEP (*(.gnu.linkonce.s.*))
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KEEP (*(.sdata2))
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KEEP (*(.sdata2.*))
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KEEP (*(.gnu.linkonce.s2.*))
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KEEP (*(.jcr))
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*(.dram1 .dram1.*)
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*libphy.a:(.rodata .rodata.*)
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*libkarch.a:esp_cache_utils.*(.rodata .rodata.*)
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*libkarch.a:esp_spiflash.*(.rodata .rodata.*)
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*libkarch.a:*esp_clk.*(.rodata .rodata.*)
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*libkarch.a:xtensa_cpupause.*(.rodata .rodata.*)
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*libkarch.a:xtensa_copystate.*(.rodata .rodata.*)
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*libkarch.a:xtensa_interruptcontext.*(.rodata .rodata.*)
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*libkarch.a:xtensa_testset.*(.rodata .rodata.*)
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*libkarch.a:spi_flash_chip*.*(.rodata .rodata.*)
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*libkarch.a:critical_section.*(.rodata .rodata.*)
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*libkarch.a:os.*(.rodata.g_int_flags_count .rodata.g_int_flags)
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*libkc.a:arch_atomic.*(.rodata .rodata.*)
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*libsched.a:sched_suspendscheduler.*(.rodata .rodata.*)
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*libsched.a:sched_thistask.*(.rodata .rodata.*)
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*libsched.a:sched_note.*(.rodata .rodata.*)
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*libsched.a:spinlock.*(.rodata .rodata.*)
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*libsched.a:irq_csection.*(.rodata .rodata.*)
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*libsched.a:irq_dispatch.*(.rodata .rodata.*)
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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/* Heap starts at the end of .data */
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_sheap = ABSOLUTE(.);
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} >KDRAM_0
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.flash.rodata :
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{
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_srodata = ABSOLUTE(.);_rodata_reserved_start = ABSOLUTE(.);
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_srodata = ABSOLUTE(.);
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/* !DO NOT PUT ANYTHING BEFORE THIS! */
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/* Should be the first. App version info. */
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*(.rodata_desc .rodata_desc.*)
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*(.rodata)
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*(.rodata.*)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_erodata = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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/* C++ constructor tables. Those are initialized by lib_cxx_initialize
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* which calls constructor functions that may be on common source code.
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*/
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. = ALIGN(4);
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_sinit = ABSOLUTE(.);
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__init_array_start = ABSOLUTE(.);
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
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__init_array_end = ABSOLUTE(.);
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_einit = ABSOLUTE(.);
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/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
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. = ALIGN(4);
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soc_reserved_memory_region_start = ABSOLUTE(.);
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KEEP (*(.reserved_memory_address))
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soc_reserved_memory_region_end = ABSOLUTE(.);
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/* System init functions registered via ESP_SYSTEM_INIT_FN */
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. = ALIGN(4);
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_esp_system_init_fn_array_start = ABSOLUTE(.);
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KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
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_esp_system_init_fn_array_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >KDROM
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.flash.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} >KIROM
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.rtc.text :
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{
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. = ALIGN(4);
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.literal .rtc.text)
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} >rtc_iram_seg AT>ROM
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.rtc.data :
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{
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*(.rtc.data)
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*(.rtc.data.*)
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*(.rtc.rodata)
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*(.rtc.rodata.*)
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/* Whatever is left from the RTC memory is used as a special heap. */
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. = ALIGN (4);
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_srtcheap = ABSOLUTE(.);
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} >rtc_slow_seg AT>ROM
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.rtc.force_slow :
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{
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. = ALIGN(4);
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_rtc_force_slow_start = ABSOLUTE(.);
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*(.rtc.force_slow .rtc.force_slow.*)
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. = ALIGN(4);
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_rtc_force_slow_end = ABSOLUTE(.);
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|
} >rtc_slow_seg AT>ROM
|
|
|
|
/* This section holds RTC FAST data that should have fixed addresses.
|
|
* The data are not initialized at power-up and are retained during deep
|
|
* sleep.
|
|
*/
|
|
|
|
.rtc_fast_reserved (NOLOAD):
|
|
{
|
|
. = ALIGN(4);
|
|
_rtc_fast_reserved_start = ABSOLUTE(.);
|
|
|
|
/* New data can only be added here to ensure existing data are not moved.
|
|
* Because data have adhered to the end of the segment and code is relied
|
|
* on it.
|
|
* >> put new data here <<
|
|
*/
|
|
|
|
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
|
|
|
_rtc_fast_reserved_end = ABSOLUTE(.);
|
|
} > rtc_fast_reserved_seg
|
|
|
|
_rtc_fast_reserved_length = _rtc_fast_reserved_end - _rtc_fast_reserved_start;
|
|
ASSERT((_rtc_fast_reserved_length <= LENGTH(rtc_fast_reserved_seg)),
|
|
"RTC FAST reserved segment data does not fit.")
|
|
|
|
/* This section holds RTC SLOW data that should have fixed addresses.
|
|
* The data are not initialized at power-up and are retained during deep
|
|
* sleep.
|
|
*/
|
|
|
|
.rtc_slow_reserved (NOLOAD):
|
|
{
|
|
. = ALIGN(4);
|
|
_rtc_slow_reserved_start = ABSOLUTE(.);
|
|
|
|
/* New data can only be added here to ensure existing data are not moved.
|
|
* Because data have adhered to the end of the segment and code is relied
|
|
* on it.
|
|
* >> put new data here <<
|
|
*/
|
|
|
|
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
|
|
|
_rtc_slow_reserved_end = ABSOLUTE(.);
|
|
} > rtc_slow_reserved_seg
|
|
|
|
_rtc_slow_reserved_length = _rtc_slow_reserved_end - _rtc_slow_reserved_start;
|
|
_rtc_reserved_length = _rtc_slow_reserved_length;
|
|
|
|
/* Get size of rtc slow data */
|
|
|
|
_rtc_slow_length = (_rtc_force_slow_end - _rtc_data_start);
|
|
}
|