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6f2e17c113
Add a shared NuttX PWM lower-half for the Realtek Ameba PWM timer in arch/arm/src/common/ameba, driven through the SDK fwlib. TIM8 provides a single time base feeding eight compare channels (CCR0..CCR7) that share one frequency while each carries its own duty, so a single /dev/pwm0 exposes the multichannel output via CONFIG_PWM_NCHANNELS. The fwlib PWM routines are split ROM/RAM: the time-base calls resolve from on-chip ROM, while the capture/compare calls live in fwlib ram_common/ameba_tim.c, which the build pulls into AMEBA_FWLIB_SRCS when CONFIG_AMEBA_PWM is set. Per-chip wiring (timer index, channel count, register base, input clock, IRQ, clock masks and the crossbar pad-mux code table) lives in arch/arm/src/rtl8721dx/ameba_pwm_chip.h so a port to another Ameba chip only supplies a same-named header; the pad-mux codes are a per-channel table (AMEBA_PWM_PINMUX_FIDS) rather than a computed base, so chips with a single shared code or codes grouped per timer are expressed by the header alone. The timer registers as /dev/pwm0 from pke8721daf bring-up through the stock PWM character driver; a dedicated `pwm` defconfig drives examples/pwm for validation. Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> Assisted-by: Claude <noreply@anthropic.com> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||