nuttx/arch/arm/include/armv7-a
buxiasen 5d9a1aaf75 armv7a/mmu: update from l1entry replace to TTBR0 update
The l1entry replace cause huge time when text/data is big,
Need 16KB per task to hold l1table.
Also critical_section no longer required, as table per-task maintained.

For complex goldfish emulator scarios can speed up:
     enter_nsh/application_init_done,
from 23.517300/05:07.067500
to   01.501500/00:06.587300
at least 10 times faster.

As we don't have do x_NPAGES swap out etc.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
..
barriers.h arch/arm:use UP_DSB, UP_DMB, UP_ISB as barrier standard API 2025-01-20 20:13:07 +08:00
cp15.h armv7-a/armv7-r/armv8-r: percpu reg store this_task 2024-12-06 09:27:33 +08:00
irq.h armv7a/mmu: update from l1entry replace to TTBR0 update 2025-05-12 15:01:37 +08:00