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Select LIBC_ATOMIC_IRQ at the architecture level (ARM7TDMI, ARM926EJS, ARMv6M) for chips that do not support atomic operations natively. This covers all ARM7TDMI, ARM926EJS, and Cortex-M0 based chips automatically. Also select LIBC_ATOMIC_IRQ for specific non-ARM architectures (AVR, RISC-V, SPARC, Xtensa) that lack atomic instruction support. Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
72 lines
1.5 KiB
Text
72 lines
1.5 KiB
Text
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_SPARC
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choice
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prompt "SPARC chip selection"
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default ARCH_CHIP_BM3803
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config ARCH_CHIP_BM3803
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bool "BM3803"
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select ARCH_SPARC_V8
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select ARCH_HAVE_MATH_H
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select ARCH_HAVE_RESET
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select ARCH_HAVE_IRQPRIO
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select ARCH_VECNOTIRQ
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_SERIAL_TERMIOS
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select LIBC_ATOMIC_IRQ
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---help---
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Microchip BM3803 (ARCH_SPARC_V8)
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config ARCH_CHIP_BM3823
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bool "BM3823"
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select ARCH_SPARC_V8
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select ARCH_HAVE_MATH_H
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select ARCH_HAVE_IRQPRIO
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select ARCH_VECNOTIRQ
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_SERIAL_TERMIOS
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select LIBC_ATOMIC_IRQ
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---help---
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Microchip BM3823 (ARCH_SPARC_V8)
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config ARCH_CHIP_S698PM
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bool "S698PM"
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select ARCH_SPARC_V8
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select ARCH_HAVE_MATH_H
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select ARCH_HAVE_IRQPRIO
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select ARCH_VECNOTIRQ
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_TESTSET
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select ARCH_HAVE_SERIAL_TERMIOS
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---help---
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ORBITA Sailing S698PM (ARCH_SPARC_V8)
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endchoice
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config ARCH_SPARC_V8
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bool
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default n
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select ARCH_HAVE_STACKCHECK
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config ARCH_FAMILY
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string
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default "sparc_v8" if ARCH_SPARC_V8
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config ARCH_CHIP
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string
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default "bm3803" if ARCH_CHIP_BM3803
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default "bm3823" if ARCH_CHIP_BM3823
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default "s698pm" if ARCH_CHIP_S698PM
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source "arch/sparc/src/sparc_v8/Kconfig"
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source "arch/sparc/src/bm3803/Kconfig"
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source "arch/sparc/src/bm3823/Kconfig"
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source "arch/sparc/src/s698pm/Kconfig"
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endif
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