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2192d83200
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states. Support for these instructions is required to support AVX instruction set Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
128 lines
4 KiB
ArmAsm
128 lines
4 KiB
ArmAsm
/**************************************************************************
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* arch/x86/src/intel64/intel64_saveusercontext.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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**************************************************************************/
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include "x86_64_internal.h"
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.file "intel64_saveusercontext.S"
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/**************************************************************************
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* .text
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**************************************************************************/
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.text
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.code64
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/**************************************************************************
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* Name: up_saveusercontext
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*
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* Full C prototype:
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* int up_saveusercontext(void *regs);
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*
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* Description:
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* Save the "user" context. It is not necessary to save all of the
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* registers because it is acceptable for certain registers to be
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* modified upon return from a subroutine call. On a context switch
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* back to user mode, it will appear as a return from this function.
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*
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* According to the SysV x86_64 ABI, the RAX, RDI, RSI, RDX, RCX, r8 and r9
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* are to be free for use within a procedure or function, and need not
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* be preserved.
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*
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* On entry,
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* sp points to the return address
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* rdi points to register save array
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*
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**************************************************************************/
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.globl up_saveusercontext
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.type up_saveusercontext, @function
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up_saveusercontext:
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/* callee saved regs */
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movq %rbx, (8*REG_RBX)(%rdi)
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movq %r12, (8*REG_R12)(%rdi)
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movq %r13, (8*REG_R13)(%rdi)
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movq %r14, (8*REG_R14)(%rdi)
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movq %r15, (8*REG_R15)(%rdi)
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#ifndef CONFIG_ARCH_X86_64_HAVE_XSAVE
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/* Save xmm registers */
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fxsaveq (%rdi)
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#else
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movl $XSAVE_STATE_COMPONENTS, %eax
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xor %edx, %edx
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xsave (%rdi)
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#endif
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/* Save the value of SP as will be at the time of the IRET that will
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* appear to be the return from this function.
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*
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* CURRENT STACK IRET STACK
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* ------------------------------ -----------------
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* RIP
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* CS
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* RFLAGS
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* RSP
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* ESP->Return address SS
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* Argument Alignment (16bytes)
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*
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*/
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leaq 8(%rsp), %rcx
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movq %rcx, (8*REG_RSP)(%rdi)
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/* Fetch the PC from the stack and save it in the save block */
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movq 0(%rsp), %rcx
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movq %rcx, (8*REG_RIP)(%rdi)
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/* Save the framepointer */
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movq %rbp, (8*REG_RBP)(%rdi)
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/* Save EAX=1. This will be the "apparent" return value from this
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* function when context is switch back to this thread. The non-zero
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* return value is the indication that we have been resumed.
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*/
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movq $1, (8*REG_RAX)(%rdi)
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/* Get and save the interrupt state */
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pushf
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pop %rcx
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movq %rcx, (8*REG_RFLAGS)(%rdi)
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/* And return 0 -- The zero return value is the indication that that
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* this is the original, "true" return from the function.
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*
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* 'ret' will remove the RIP from the top of the stack.
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*/
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xor %rax, %rax
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ret
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.size up_saveusercontext, . - up_saveusercontext
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.end
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