nuttx/libs/libc/machine/risc-v/arch_memmove.S
ganjing 9b20c629fe libs/libc/risc-v: Add optimized string and memory functions.
Add assembly-optimized implementations for 14 string/memory functions
using word-at-a-time techniques (DETECTNULL, broadcast+XOR) and
XLEN-adaptive macros for both RV32 and RV64:

 - memmove: direction check + forward tail to memcpy, reverse path
   with 16xSZREG unroll and shift-merge for misaligned src.
 - memcmp: word-granularity compare when both pointers share alignment,
   bytewise fallback for mismatched pointers.
 - memchr: broadcast target byte, XOR with each word, DETECTNULL to
   find matches. Counter-based bounds (no pointer overflow).
 - strlen: DETECTNULL word loop, constants loaded from .srodata.
 - strnlen: strlen with counter-based length limit.
 - strcpy/strncpy: word loop with DETECTNULL, zero-fill remainder
   for strncpy. strncpy reuses strcpy via #define USE_AS_STRNCPY.
 - stpcpy/stpncpy: reuse strcpy/strncpy via #define USE_AS_STPCPY.
 - strchr/strchrnul: broadcast+XOR detecting both target char and
   null simultaneously. strchrnul reuses strchr via #define.
 - strrchr: forward scan recording last match position.
 - strncmp: word-at-a-time compare with null detection and counter.
 - strcat: strlen(dst) then strcpy(dst_end, src) word-at-a-time.

Each function is independently selectable via CONFIG_RISCV_<FUNC>,
or all enabled together with CONFIG_RISCV_STRING_FUNCTION=y.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: ganjing <ganjing@xiaomi.com>
2026-08-12 10:23:47 +08:00

107 lines
2.5 KiB
ArmAsm

/****************************************************************************
* libs/libc/machine/risc-v/arch_memmove.S
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#include "libc.h"
#ifdef LIBC_BUILD_MEMMOVE
#include "asm.h"
.text
.global ARCH_LIBCFUN(memmove)
.type ARCH_LIBCFUN(memmove), @function
.align 2
/************************************************************************************
* Name: memmove
*
* void *memmove(void *dst, const void *src, size_t n)
*
* Direction-aware copy with reverse path for overlapping regions.
************************************************************************************/
ARCH_LIBCFUN(memmove):
.cfi_sections .debug_frame
.cfi_startproc
beqz a2, .Ldone
bltu a1, a0, .Lcheck_overlap
tail ARCH_LIBCFUN(memcpy)
.Lcheck_overlap:
add t0, a1, a2
bleu t0, a0, .Lfwd
j .Lreverse
.Lfwd:
tail ARCH_LIBCFUN(memcpy)
.Lreverse:
mv t6, a0
add t0, a0, a2
add t1, a1, a2
li t2, 2*SZREG
bleu a2, t2, .Lrev_byte
andi t2, t0, SZREG-1
beqz t2, .Lrev_aligned
sub a2, a2, t2
.Lrev_align:
addi t0, t0, -1
addi t1, t1, -1
lbu t3, 0(t1)
sb t3, 0(t0)
addi t2, t2, -1
bnez t2, .Lrev_align
.Lrev_aligned:
andi t2, t1, SZREG-1
bnez t2, .Lrev_byte_remain
li t3, SZREG
bltu a2, t3, .Lrev_byte_remain
.Lrev_word:
addi t0, t0, -SZREG
addi t1, t1, -SZREG
REG_L t2, 0(t1)
REG_S t2, 0(t0)
sub a2, a2, t3
bgeu a2, t3, .Lrev_word
.Lrev_byte_remain:
beqz a2, .Lrev_done
.Lrev_byte:
addi t0, t0, -1
addi t1, t1, -1
lbu t2, 0(t1)
sb t2, 0(t0)
addi a2, a2, -1
bnez a2, .Lrev_byte
.Lrev_done:
mv a0, t6
.Ldone:
ret
.cfi_endproc
.size ARCH_LIBCFUN(memmove), .-ARCH_LIBCFUN(memmove)
#endif