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6574028920
Add the ARM architecture-level support and build system for the Realtek
Ameba WHC (Wi-Fi Host Controller) dual-core SoCs:
- RTL8721Dx (KM4 Cortex-M33 host + KM0 NP)
- RTL8720F (KM4TZ Cortex-M33 secure host + KM4NS NP)
New directories under arch/arm/src/:
- common/ameba/ -- IC-agnostic glue (os_wrapper, netdev, KV store,
flash MTD, WHC Wi-Fi, SDK bootstrap)
- rtl8721dx/ -- RTL8721Dx register-level drivers
- rtl8720f/ -- RTL8720F register-level drivers
New directories under arch/arm/include/:
- rtl8721dx/ -- RTL8721Dx IRQ and chip headers
- rtl8720f/ -- RTL8720F IRQ and chip headers
Also includes tools/nxstyle.c white-list entries for the Realtek SDK
CamelCase symbols and tools/ameba/Config.mk for the make flash target.
Signed-off-by: raul_chen <raul_chen@realsil.com.cn>
147 lines
7.2 KiB
C
147 lines
7.2 KiB
C
/****************************************************************************
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* arch/arm/include/rtl8720f/irq.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_RTL8720F_IRQ_H
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#define __ARCH_ARM_INCLUDE_RTL8720F_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Processor Exceptions (vectors 0-15) */
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#define RTL8720F_IRQ_RESERVED (0) /* Reserved vector (only used with
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* CONFIG_DEBUG_FEATURES) */
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/* Vector 1: Reset (not handler) */
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#define RTL8720F_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt */
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#define RTL8720F_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define RTL8720F_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
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#define RTL8720F_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define RTL8720F_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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#define RTL8720F_IRQ_SECUREFAULT (7) /* Vector 7: Secure fault */
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#define RTL8720F_IRQ_SVCALL (11) /* Vector 11: SVC call */
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#define RTL8720F_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
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#define RTL8720F_IRQ_PENDSV (14) /* Vector 14: Pendable system service */
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#define RTL8720F_IRQ_SYSTICK (15) /* Vector 15: System tick */
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#define RTL8720F_IRQ_FIRST (16) /* Vector number of the first external
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* interrupt */
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/* External interrupts (vectors >= 16). These map to the RTL8720F km4tz
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* (AP / host) peripheral interrupt vector numbers (APIRQn, 0..57) as defined
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* by the SDK's component/soc/RTL8720F/fwlib/include/ameba_vector_table.h
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* (CONFIG_ARM_CORE_CM4_KM4TZ branch).
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*/
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#define RTL8720F_IRQ_WIFI_FISR_FESR (RTL8720F_IRQ_FIRST + 0)
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#define RTL8720F_IRQ_WL_PROTOCOL (RTL8720F_IRQ_FIRST + 1)
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#define RTL8720F_IRQ_AP_WAKE (RTL8720F_IRQ_FIRST + 2)
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#define RTL8720F_IRQ_IPC_KM4 (RTL8720F_IRQ_FIRST + 3) /* IPC_KM4TZ */
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#define RTL8720F_IRQ_IWDG (RTL8720F_IRQ_FIRST + 4)
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#define RTL8720F_IRQ_TIMER0 (RTL8720F_IRQ_FIRST + 5)
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#define RTL8720F_IRQ_TIMER1 (RTL8720F_IRQ_FIRST + 6)
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#define RTL8720F_IRQ_TIMER2 (RTL8720F_IRQ_FIRST + 7)
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#define RTL8720F_IRQ_TIMER3 (RTL8720F_IRQ_FIRST + 8)
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#define RTL8720F_IRQ_TIMER4 (RTL8720F_IRQ_FIRST + 9)
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#define RTL8720F_IRQ_TIMER5 (RTL8720F_IRQ_FIRST + 10)
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#define RTL8720F_IRQ_TIMER6 (RTL8720F_IRQ_FIRST + 11)
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#define RTL8720F_IRQ_PMC_TIMER0 (RTL8720F_IRQ_FIRST + 12)
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#define RTL8720F_IRQ_PMC_TIMER1 (RTL8720F_IRQ_FIRST + 13)
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#define RTL8720F_IRQ_UART0 (RTL8720F_IRQ_FIRST + 14)
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#define RTL8720F_IRQ_UART1 (RTL8720F_IRQ_FIRST + 15)
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#define RTL8720F_IRQ_UART2 (RTL8720F_IRQ_FIRST + 16)
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#define RTL8720F_IRQ_UART_LOG (RTL8720F_IRQ_FIRST + 17)
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#define RTL8720F_IRQ_GPIOA (RTL8720F_IRQ_FIRST + 18)
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#define RTL8720F_IRQ_RSVD (RTL8720F_IRQ_FIRST + 19)
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#define RTL8720F_IRQ_I2C0 (RTL8720F_IRQ_FIRST + 20)
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#define RTL8720F_IRQ_I2C1 (RTL8720F_IRQ_FIRST + 21)
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#define RTL8720F_IRQ_GDMA0_CH0 (RTL8720F_IRQ_FIRST + 22)
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#define RTL8720F_IRQ_GDMA0_CH1 (RTL8720F_IRQ_FIRST + 23)
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#define RTL8720F_IRQ_GDMA0_CH2 (RTL8720F_IRQ_FIRST + 24)
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#define RTL8720F_IRQ_GDMA0_CH3 (RTL8720F_IRQ_FIRST + 25)
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#define RTL8720F_IRQ_GDMA0_CH4 (RTL8720F_IRQ_FIRST + 26)
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#define RTL8720F_IRQ_GDMA0_CH5 (RTL8720F_IRQ_FIRST + 27)
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#define RTL8720F_IRQ_GDMA0_CH6 (RTL8720F_IRQ_FIRST + 28)
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#define RTL8720F_IRQ_GDMA0_CH7 (RTL8720F_IRQ_FIRST + 29)
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#define RTL8720F_IRQ_SPI0 (RTL8720F_IRQ_FIRST + 30)
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#define RTL8720F_IRQ_SPI1 (RTL8720F_IRQ_FIRST + 31)
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#define RTL8720F_IRQ_SPORT (RTL8720F_IRQ_FIRST + 32)
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#define RTL8720F_IRQ_RTC (RTL8720F_IRQ_FIRST + 33)
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#define RTL8720F_IRQ_ADC (RTL8720F_IRQ_FIRST + 34)
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#define RTL8720F_IRQ_BOR (RTL8720F_IRQ_FIRST + 35)
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#define RTL8720F_IRQ_PWR_DOWN (RTL8720F_IRQ_FIRST + 36)
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#define RTL8720F_IRQ_PKE (RTL8720F_IRQ_FIRST + 37)
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#define RTL8720F_IRQ_TRNG (RTL8720F_IRQ_FIRST + 38)
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#define RTL8720F_IRQ_AON_TIM (RTL8720F_IRQ_FIRST + 39)
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#define RTL8720F_IRQ_AON_WAKEPIN (RTL8720F_IRQ_FIRST + 40)
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#define RTL8720F_IRQ_SDIO_WIFI (RTL8720F_IRQ_FIRST + 41)
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#define RTL8720F_IRQ_SDIO_BT (RTL8720F_IRQ_FIRST + 42)
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#define RTL8720F_IRQ_RXI300 (RTL8720F_IRQ_FIRST + 43)
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#define RTL8720F_IRQ_PSRAMC (RTL8720F_IRQ_FIRST + 44)
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#define RTL8720F_IRQ_SPI_FLASH (RTL8720F_IRQ_FIRST + 45)
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#define RTL8720F_IRQ_RSIP (RTL8720F_IRQ_FIRST + 46)
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#define RTL8720F_IRQ_AES (RTL8720F_IRQ_FIRST + 47)
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#define RTL8720F_IRQ_SHA (RTL8720F_IRQ_FIRST + 48)
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#define RTL8720F_IRQ_AES_S (RTL8720F_IRQ_FIRST + 49)
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#define RTL8720F_IRQ_SHA_S (RTL8720F_IRQ_FIRST + 50)
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#define RTL8720F_IRQ_KM4NS_WDG_RST (RTL8720F_IRQ_FIRST + 51)
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#define RTL8720F_IRQ_KM4TZ_NS_WDG (RTL8720F_IRQ_FIRST + 52)
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#define RTL8720F_IRQ_KM4TZ_S_WDG (RTL8720F_IRQ_FIRST + 53)
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#define RTL8720F_IRQ_OCP (RTL8720F_IRQ_FIRST + 54)
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#define RTL8720F_IRQ_BT_CTRL_HIGH (RTL8720F_IRQ_FIRST + 55)
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#define RTL8720F_IRQ_BT_CTRL_LOW (RTL8720F_IRQ_FIRST + 56)
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#define RTL8720F_IRQ_IR (RTL8720F_IRQ_FIRST + 57)
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#define RTL8720F_IRQ_NEXTINT (58) /* Number of external interrupts
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* (APIRQn PERI_IRQ_MAX) */
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#define NR_IRQS (RTL8720F_IRQ_FIRST + RTL8720F_IRQ_NEXTINT)
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_RTL8720F_IRQ_H */
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