nuttx/Documentation
rongyichang 3d0f6fcbad boards/risc-v: Add lvgl64_vector configuration for RISC-V QEMU
Add new RISC-V 64-bit QEMU configuration with:
- 64-bit RISC-V (RV64) architecture support
- RISC-V Vector Extension (RVV/V-extension) enabled
- LVGL graphics framework integration
- VirtIO GPU and input device support
- NSH shell with built-in applications

This configuration enables developers to build and test LVGL graphical
applications on 64-bit RISC-V targets with Vector extension support,
providing a foundation for future SIMD optimization work.

Includes:
- defconfig: Complete configuration file with all necessary options
- Updated index.rst: Build and run instructions with QEMU launch command

Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2025-12-24 09:44:01 +08:00
..
_extensions
_static
_templates
applications Documentation: add flashtool utility 2025-12-23 08:48:26 -03:00
components drivers/mtd: add MTDIOC_ISBAD ioctl 2025-12-23 09:26:34 -03:00
contributing
debugging sched: Improve nxsched stack overflow checking implementation 2025-10-11 18:00:44 +08:00
faq
guides docs/guides/lwl: move lwl's README.txt to lwl.rst 2025-12-23 15:20:06 +01:00
implementation Documentation/Make: add implementation/make_build_system.rst 2025-11-20 09:39:16 -05:00
introduction
logos
platforms boards/risc-v: Add lvgl64_vector configuration for RISC-V QEMU 2025-12-24 09:44:01 +08:00
quickstart
reference docs/guides/lwl: move lwl's README.txt to lwl.rst 2025-12-23 15:20:06 +01:00
ReleaseNotes Documentation: add NuttX-12.12.0 release notes 2025-12-23 18:35:17 +08:00
standards
.gitignore
conf.py
glossary.rst
index.rst
known-warnings.txt
legacy_README.md
make.bat
Makefile
Pipfile
Pipfile.lock Documentation/Pipfile.lock: bump urllib3 from 2.2.3 to 2.6.0 2025-12-10 19:23:50 +08:00
substitutions.rst