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3a5d5e08d5
Add support for Cortex-M33 code to initialize the M7 TCM memories before releasing it to run. The TCM has ECC, which needs to be initialized before the memory is usable for M7. Specifically, the TCM needs to be initialized sequentially in 64-bit writes. Use eDMA4 for this; this is the same mechanism which the NXP MCUXpresso SDK code does. Split imxrt118x_release_cm7() into imxrt118x_prepare_cm7() and imxrt118x_start_cm7(). The TCM ECC initialization is done in imxrt118x_prepare_cm7(), after the M7 has been released from reset and before the M7 is started. Also reset M7_CFG[TCM_SIZE] to the default 256 KiB ITCM / 256 KiB DTCM layout. Co-Authored-By: Jukka Laitinen <jukka.laitinen@tii.ae> Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||