Ville Juven 90d73153fb riscv/arch_elf: Check for _HI20 relocation validity ... As pointed out in #11322 there is a hardware design issue in RISC-V that affects RV64 relocations. The problem is with how address bits are loaded into registers via lui / auipc and sign extension. If the hi20 relocation value happens to have its 32-bit sign bit set, i.e. value is 0x80000000 (but not negative! i.e. negative in 64-bit format) the relocation will fail, as the address is erroneously sign extended: 0x00000000_80000000 becomes 0xffffffff_80000000 which is not correct. Also, make sure the correct opcode is used with PCREL_HI20, it expects AUIPC (not LUI). The C compiler will never emit such code but when hand- writing assembly code this can happen.		2023-12-14 06:54:17 -08:00
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common	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
gnu	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
rv32	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
rv64	build: add initial cmake build system	2023-07-08 13:50:48 +08:00
arch_elf.c	riscv/arch_elf: Check for _HI20 relocation validity	2023-12-14 06:54:17 -08:00
CMakeLists.txt	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
Kconfig	arm64/gnu:Set arch_* optimizations to be on by default.	2023-08-19 18:43:08 +08:00
Make.defs	libc: add risc-v libc function	2023-01-10 11:31:26 +08:00