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nuttx/arch/xtensa/include/esp32s3
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Tiago Medicci Serrano 0ddb64555a esp32s3/irq: Allow IRAM ISRs to run during SPI flash operation 
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.
2023-10-05 11:25:43 +08:00
..
chip.h xtensa/esp32s3: Clean up and improve GPIO driver interface 2022-03-19 01:08:27 +02:00
core-isa.h libc/machine/xtensa: make longjmp safe against context switch 2022-11-22 19:34:44 +01:00
irq.h esp32s3/irq: Allow IRAM ISRs to run during SPI flash operation 2023-10-05 11:25:43 +08:00
tie-asm.h
tie.h