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https://github.com/apache/nuttx.git
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290 lines
8.2 KiB
C
290 lines
8.2 KiB
C
/****************************************************************************
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* arch/arm/src/samd2l2/sam_sercom.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* References:
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* 1. "Atmel SAM D20J / SAM D20G / SAM D20E ARM-Based Microcontroller
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* Datasheet", 42129J–SAM–12/2013
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <assert.h>
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#include "arm_arch.h"
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#include "sam_config.h"
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#include "sam_pm.h"
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#include "sam_gclk.h"
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#include "sam_sercom.h"
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#undef HAVE_SERCOM0_4
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#if defined(CONFIG_SAMD2L2_SERCOM0) || defined(CONFIG_SAMD2L2_SERCOM1) || \
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defined(CONFIG_SAMD2L2_SERCOM2) || defined(CONFIG_SAMD2L2_SERCOM3) || \
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defined(CONFIG_SAMD2L2_SERCOM4)
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# define HAVE_SERCOM0_4
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sercom_coreclk_configure
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*
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* Description:
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* Configure the SERCOM core source clock.
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*
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* Two generic clocks are used by the SERCOM: GCLK_SERCOMx_CORE and
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* GCLK_SERCOM_SLOW. The core clock (GCLK_SERCOMx_CORE) is required to
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* clock the SERCOM while operating as a master, while the slow clock
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* (GCLK_SERCOM_SLOW) is only required for certain functions. SERCOM
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* modules must share the same slow GCLK channel ID.
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*
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* The baud-rate generator runs off the GCLK_SERCOMx_CORE clock (or,
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* optionally, external clock).
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*
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****************************************************************************/
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#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
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void sercom_coreclk_configure(int sercom, int gclkgen, bool wrlock)
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{
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uint16_t regval;
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uint8_t gclkcore;
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/* Set up the SERCOMN_GCLK_ID_CORE clock */
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gclkcore = (uint8_t)SERCOM_GCLK_ID_CORE(sercom);
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regval = ((uint16_t)gclkcore << GCLK_CLKCTRL_ID_SHIFT);
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/* Select and disable the SERCOMN_GCLK_ID_CORE generic clock */
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Wait for clock to become disabled */
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while ((getreg16(SAM_GCLK_CLKCTRL) & GCLK_CLKCTRL_CLKEN) != 0);
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/* Select the SERCOMN_GCLK_ID_CORE source clock generator */
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regval |= (uint16_t)gclkgen << GCLK_CLKCTRL_GEN_SHIFT;
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/* Write the new configuration */
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Enable the SERCOMN_GCLK_ID_CORE generic clock, optionally locking
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* further writes to this GCLK.
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*/
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regval |= GCLK_CLKCTRL_CLKEN;
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if (wrlock)
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{
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regval |= GCLK_CLKCTRL_WRTLOCK;
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}
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putreg16(regval, SAM_GCLK_CLKCTRL);
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}
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#endif
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/****************************************************************************
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* Name: sercom_slowclk_configure
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*
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* Description:
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* Configure the SERCOM slow source clock.
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*
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* Two generic clocks are used by the SERCOM: GCLK_SERCOMx_CORE and
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* GCLK_SERCOM_SLOW. The core clock (GCLK_SERCOMx_CORE) is required to
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* clock the SERCOM while operating as a master, while the slow clock
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* (GCLK_SERCOM_SLOW) is only required for certain functions. SERCOM
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* modules must share the same slow GCLK channel ID.
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*
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****************************************************************************/
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void sercom_slowclk_configure(int sercom, int gclkgen)
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{
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#if defined(CONFIG_ARCH_FAMILY_SAML21)
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#ifdef HAVE_SERCOM0_4
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static bool configured = false;
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM5
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static bool configured5 = false;
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#endif
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#ifdef CONFIG_DEBUG_ASSERTIONS
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#ifdef HAVE_SERCOM0_4
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static uint8_t slowgen04 = 0xff;
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM5
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static uint8_t slowgen5 = 0xff;
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#endif
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#endif
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/* Setup the SERCOMN_GCLK channel. SERCOM0-4 use a common channel, but
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* SERCOM5 uses a different channel. Configuration should be done only
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* once.
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*/
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switch (sercom)
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{
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#ifdef HAVE_SERCOM0_4
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#ifdef CONFIG_SAMD2L2_SERCOM0
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case 0:
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM1
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case 1:
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM2
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case 2:
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM3
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case 3:
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#endif
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#ifdef CONFIG_SAMD2L2_SERCOM4
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case 4:
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#endif
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if (!configured)
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{
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/* Configure the common slow clock channel */
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sam_gclk_chan_enable(GCLK_CHAN_SERCOM0_SLOW, gclkgen);
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/* The slow clock is now configured and should not be configured
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* again.
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*/
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configured = true;
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#ifdef CONFIG_DEBUG_ASSERTIONS
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slowgen04 = (uint8_t)gclkgen;
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#endif
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}
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#ifdef CONFIG_DEBUG_ASSERTIONS
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/* Already configured. This is okay provided that the same GCLK
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* generator is being used. Otherwise, there is a problem.
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*/
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else
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{
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DEBUGASSERT((int)slowgen04 == gclkgen);
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}
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#endif
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break;
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#endif /* HAVE_SERCOM0_4 */
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#ifdef CONFIG_SAMD2L2_SERCOM5
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case 5:
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if (!configured5)
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{
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/* Configure the common slow clock channel */
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sam_gclk_chan_enable(GCLK_CHAN_SERCOM5_SLOW, gclkgen);
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/* The slow clock is now configured and should not be configured
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* again.
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*/
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configured5 = true;
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#ifdef CONFIG_DEBUG_ASSERTIONS
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slowgen5 = (uint8_t)gclkgen;
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#endif
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}
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#ifdef CONFIG_DEBUG_ASSERTIONS
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/* Already configured. This is okay provided that the same GCLK
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* generator is being used. Otherwise, there is a problem.
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*/
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else
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{
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DEBUGASSERT((int)slowgen5 == gclkgen);
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}
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#endif
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break;
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#endif /* CONFIG_SAMD2L2_SERCOM5 */
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/* Unsupported or invalid SERCOM number provided */
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default:
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DEBUGPANIC();
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break;
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}
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#elif defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
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static bool configured = false;
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uint16_t regval;
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/* Since GCLK_SERCOM_SLOW is shared amongst all SERCOM modules, it should
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* only be configured one time.
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*/
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if (!configured)
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{
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/* Set up the SERCOM_GCLK_ID_SLOW clock */
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regval = (SERCOM_GCLK_ID_SLOW << GCLK_CLKCTRL_ID_SHIFT);
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/* Select and disable the SERCOM_GCLK_ID_SLOW generic clock */
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Wait for clock to become disabled */
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while ((getreg16(SAM_GCLK_CLKCTRL) & GCLK_CLKCTRL_CLKEN) != 0);
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/* Select the SERCOM_GCLK_ID_SLOW clock source generator */
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regval |= (uint16_t)gclkgen << GCLK_CLKCTRL_GEN_SHIFT;
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/* Write the new configuration */
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Enable the GCLK_SERCOM_SLOW generic clock and lock further
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* writes to this GCLK. When this bit is written, it will lock
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* further writes to the generic clock pointed by the CLKCTRL.ID. The
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* generic clock generator pointed by CLKCTRL.GEN and the GENDIV.DIV
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* will also be locked.
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*
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* We lock the SERCOM slow clock because it is common to all SERCOM
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* modules and, once set, should not be changed again.
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*/
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regval |= (/* GCLK_CLKCTRL_WRTLOCK | */ GCLK_CLKCTRL_CLKEN);
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Now we are configured */
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configured = true;
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}
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#endif
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}
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