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2cc38e43fb
Add a parameterised NuttX timer lower-half for the Realtek Ameba general-purpose timers, sitting on the SDK fwlib RTIM register layer and registered at /dev/timerN. The shared driver (arch/arm/src/common/ameba/ameba_timer.c) reads a per-chip instance table (ameba_timer_chip.h) for each timer's base, input clock, RCC gate masks and IRQ; the period is programmed directly in microseconds and converted to the 32-bit auto-reload with one clkfreq formula. On the pke8721daf two of the 32.768 kHz "basic" (LTIM) timers are exposed: /dev/timer0 is TIM1 and /dev/timer1 is TIM2. TIM0 is left untouched because the boot ROM claims it as the always-on system timer (SYSTIMER); reprogramming it would break every SDK delay. The RTIM time-base entry points resolve to ROM, while the interrupt-clear and period-change helpers come from the fwlib RAM source ameba_tim.c (shared with the PWM driver). Verified on hardware with examples/timer against both devices: the update interrupt fires at the requested 1 s interval (measured with the independent ROM SYSTIMER = 32768 ticks = 1.000 s). Also whitelist the vendor RTIM_ symbol prefix in tools/nxstyle.c, alongside the existing RCC_/SYSTIMER_ Ameba SDK entries. Assisted-by: Claude <noreply@anthropic.com> Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| dummy | ||
| hc/m9s12 | ||
| mips | ||
| misoc/lm32/misoc | ||
| or1k/mor1kx/or1k | ||
| renesas | ||
| risc-v | ||
| sim/sim/sim | ||
| sparc | ||
| tricore | ||
| x86/qemu/qemu-i486 | ||
| x86_64/qemu/qemu-intel64 | ||
| xtensa | ||
| z16/z16f/z16f2800100zcog | ||
| z80 | ||
| .gitignore | ||
| Board.mk | ||
| boardctl.c | ||
| CMakeLists.txt | ||
| dummy.c | ||
| Kconfig | ||
| Makefile | ||