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Wire the shared Ameba SPI (DesignWare SSI) driver (arch/arm/src/common/ameba/ameba_spi.c) into the RTL8720F build and expose the SPI0/SPI1 masters at /dev/spiN. Add the per-chip ameba_spi_chip.h with the RTL8720F controller bases (0x401C1000 / 0x401C2000, non-secure aliases), the group-0 SPI clock masks, the per-signal crossbar pad-mux codes (RTL8720F has no generic PINMUX_FUNCTION_SPI), and the SYS_PLL-based ip_clk computation (REG_LSYS_CKD_SYS_PLL_GRP0 HPERI divider). The chip header declares the SYS_PLL_ClkGet() query its AMEBA_SPI_IPCLK() uses, since RTL8720F has no PLL_ClkGet(). Compile the common driver and the SDK fwlib SSI RAM source under CONFIG_AMEBA_SPI, register the bus in the board bring-up, and add an "spi" board configuration exercising the system/spi spitool. Assisted-by: Claude <noreply@anthropic.com> Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> |
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