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currently esp32 protected mode requires a patched bootloader. it's a bit cumbersome to build the bootloader for that purpose. this commit attempts to remove the need of the patched bootloader by applying the changes by ourselves using esp hal.
80 lines
2.5 KiB
C
80 lines
2.5 KiB
C
/****************************************************************************
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* arch/xtensa/src/esp32/esp32_userspace_pid.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "esp_attr.h"
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#include "hal/mmu_hal.h"
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#include "hal/mmu_ll.h"
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#include "hal/cache_ll.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32_userspace_init_for_pid
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*
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* Description:
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* A helper for esp32_userspace.
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* Separated to avoid conflicts between esp hal vs nuttx.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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IRAM_ATTR void
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esp32_userspace_init_for_pid(void)
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{
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int i;
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/* Xtensa CPU does speculative load/store on VAddr1/2/3 when connected
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* to cache. Hence it requires all the pages of VAddr2/3 to be set valid
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* to any physical page.
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* Marking any page invalid would stall the CPU.
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*/
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for (i = 64; i < 256; i++)
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{
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if (!mmu_ll_check_entry_valid(0, i))
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{
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mmu_ll_write_entry(0, i, 0, MMU_TARGET_FLASH0);
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}
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if (!mmu_ll_check_entry_valid(1, i))
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{
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mmu_ll_write_entry(1, i, 0, MMU_TARGET_FLASH0);
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}
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}
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cache_ll_l1_enable_bus(0, CACHE_BUS_IBUS1);
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#ifdef CONFIG_SMP
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cache_ll_l1_enable_bus(1, CACHE_BUS_IBUS1);
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#endif
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}
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