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8788590436
Add the AM62x architecture support needed to boot NuttX on TI K3 AM62x platforms. This includes the chip integration, memory map, IRQ definitions, low-level console support, boot code, and the AM62x 16550 serial lower half. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
107 lines
3.6 KiB
C
107 lines
3.6 KiB
C
/****************************************************************************
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* arch/arm64/include/am62x/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Reference: AM62x TRM (SPRSP43) §2.1 Memory Map §9.2 GIC-600 */
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#ifndef __ARCH_ARM64_INCLUDE_AM62X_CHIP_H
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#define __ARCH_ARM64_INCLUDE_AM62X_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Size macros used in assembly and C */
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#define KB(x) ((x) << 10)
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#define MB(x) (KB(x) << 10)
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#define GB(x) (MB(UINT64_C(x)) << 10)
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/* GIC-600 addresses (TRM §9.2) ********************************************/
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/* Distributor — one per system */
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#define CONFIG_GICD_BASE 0x01800000
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/* Redistributor — one 128 KB frame per Cortex-A53 core */
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#define CONFIG_GICR_BASE 0x01880000
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/* Stride between consecutive per-core redistributor frames (128 KB) */
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#define CONFIG_GICR_OFFSET 0x20000
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/* Extract cluster ID from MPIDR_EL1.
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* AM62x has a single cluster (Aff1=0); mask off Aff0 (bits[7:0]).
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*/
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#define MPID_TO_CLUSTER_ID(mpid) ((mpid) & ~0xffUL)
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/* NuttX load address — must match U-Boot kernel_addr_r and the linker
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* script origin. 0x8200_0000 avoids U-Boot's reserved region at the
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* bottom of DDR (0x8000_0000–0x81FF_FFFF).
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*/
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#define CONFIG_LOAD_BASE 0x82000000
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/* Memory map constants — used by am62x_boot.c MMU region table and by
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* the common arm64 linker/boot code. These are NOT Kconfig symbols;
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* they are chip-level C macros, following the same pattern as a64/chip.h.
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* Board-specific DDR sizes are overridden in defconfig via CONFIG_RAM_SIZE
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* (decimal bytes) — these macros describe the default mapped window.
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*/
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/* DDR: 512 MB at 0x8000_0000 (common minimum for both boards) */
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#define CONFIG_RAMBANK1_ADDR 0x80000000
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#define CONFIG_RAMBANK1_SIZE MB(512)
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/* Device I/O flat-map: all peripherals in the lower 2 GB */
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#define CONFIG_DEVICEIO_BASEADDR 0x00000000
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#define CONFIG_DEVICEIO_SIZE GB(2)
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/****************************************************************************
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* Assembly Macros
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****************************************************************************/
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#ifdef __ASSEMBLY__
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/* get_cpu_id xreg0
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*
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* Read current CPU ID from MPIDR_EL1 Aff0 field [7:0].
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* On AM62x the four A53 cores are numbered 0-3 in Aff0.
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*/
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.macro get_cpu_id xreg0
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mrs \xreg0, mpidr_el1
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ubfx \xreg0, \xreg0, #0, #8
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM64_INCLUDE_AM62X_CHIP_H */
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