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Add initial Apache NuttX support for the Allwinner D1 / T-Head C906 running in supervisor mode under OpenSBI. Add support for: - RV64 D1 architecture definitions - Lichee RV 86 Panel board configuration - UART0 console at 115200 baud - D1 PLIC interrupt controller - native D1 Timer1 scheduler tick - early inherited-watchdog disable - FLAT S-mode NSH configuration The port has been tested on physical Sipeed Lichee RV / 86 Panel hardware and boots to an interactive NuttShell. The scheduler tick uses OSC24M Timer1 at 1000 Hz. The Timer1 interval register is programmed with 23999 to produce exactly 24000 input clocks per tick on the physical D1. Assisted-by: OpenAI Codex:gpt-5.6-sol Signed-off-by: Lance Harvie <lanceharvie@gmail.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| hc | ||
| mips | ||
| misco | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| index.rst | ||