Several documentation files are referenced in multiple toctrees,
causing Sphinx build warnings like:
document is referenced in multiple toctrees: [...], selecting: [...]
Fix by narrowing glob patterns in parent toctrees to only match
subdirectory index files, and replacing a toctree directive with
a :doc: cross-reference:
- platforms/arm/index.rst: glob */* -> */index
- platforms/index.rst: glob */* -> */index
- guides/changing_systemclockconfig.rst: toctree -> :doc: ref
Fixes#14785
Signed-off-by: hanzj <hanzj@xiaomi.com>
Document the AM62x platform and add board guides for BeaglePlay and
PocketBeagle2. The BeaglePlay guide includes the validated manual
U-Boot boot flow used for hardware testing.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Add documentation for the T3 Gemstone O1 (t3-gem-o1) development board,
including board specifications, serial console, available
configurations (nsh), and installation instructions via RemoteProc.
Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>
Update the Nucleo-N657X0-Q board page to reflect the autoleds and
userleds support added in the preceding commits:
* Drop "user LEDs" from the "not yet wired up" warning list (only
the user button remains there).
* Replace the placeholder "no userleds/buttons drivers" paragraph in
the Buttons and LEDs section with a description of the two
mutually-exclusive paths (ARCH_LEDS vs USERLED) and a pointer to
the new nucleo-n657x0-q:leds configuration.
* Add a leds entry under Configurations.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Include i.MXRT1170 as supported chip and add newer unsupported chips.
Also updated the cache chapter to reflect current state of driver and
support.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Add documentation for the STMicro STM32N6 chip family and the
Nucleo-N657X0-Q development board introduced in the previous two
commits.
- platforms/arm/stm32n6/index.rst
Chip overview: core, peripherals supported in the initial
port, and a pointer to the board page.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/index.rst
Board page, structured per Documentation/contributing/
doc_templates/board.rst: hardware summary, user LED and
button pin map, the two shipped configs (nsh, ostest),
and the DEV-mode flash recipe used to load NuttX into
AXISRAM via ST-LINK.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/nucleo-n657x0-q.jpg
Photograph of the board, referenced from the board page.
The pages are picked up by the existing glob-based toctree in
Documentation/platforms/arm/index.rst, no parent index changes are
required.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
* NuttX supports ESP32-P4 >= v3.0 by default.
* In order to run on older chips configuration tuning is required.
* Without configutation tune boot loop happens on older chips.
* Added note on WaveShare ESP32-P4-Nano board that is almost identical
to existing ESP32-P4-Function-EV-Board board, so configs are compatible,
but it has v1.3 chip, thus config tune is required as documented above.
* Added cross-file reference label to esp32p4-function-ev-board.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Added support for USB host to use an USB CDC-ECM device.
This class is used for usb-ethernet adapters as well as many modems.
Signed-off-by: daniellizewski <daniellizewski@geotab.com>
This commit describes ethernet support on ESP32-P4 SoC and its
ESP32-P4-Function-EV-Board v1.5.2.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit explain that the QE encoder driver can be used to
internal QE from microcontroller or external magnetic encoder.
Also explains how to use the mt6816 board profile to STM32F4Discovery
Signed-off-by: Alan C. Assis <acassis@gmail.com>
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.
Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Adds a configuration that combines the `nimble` example with a SMARTFS
file system configured in the chip's flash.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
* Initial experimental / work in progress implementation.
* New board name is esp32s3-ws-lcd128.
* Supports Kconfig delectable w/wo touch variants (lcd gpios difference).
* IMU QMI8658 bringups is put into esp32s3/common/src to share with other
boards. Pin defines are located at <board>include/board.h and referenced
with `#include <arch/board/board.h>`.
* Supported configurations: nsh, ostest, coremark, touch-lvgl, notouch-lvgl,
imu-qmi8658, watchdog.
* Does not have touch panel driver yet.
* Created board documentation. Added sphinx inline cross-references.
* TODO: Fix SPI GC9A01A LCD pixel format colors.
* TODO: Create I2C CST816S touch panel driver.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Updated the `rmt` defconfig description for the Espressif's SoCs.
Use the `irtest` testing app (instead of the deprecated `rmtchar`)
to test the RMT peripheral.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit adds the Documentation to MPR121 Keypad and the board
profile documentation to STM32F4Discovery board.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Enable USART3 support for STM32F412 and use it as the default NUCLEO-F412ZG nsh console path.
The ST-LINK virtual COM port on this board is wired to USART3 on PD8/PD9. Restore USART2 to its header-pin routing, switch the nsh defconfig to USART3, and update the board documentation to match the shipped solder-bridge configuration described in issue #17722.
Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
Add board support for on-chip bxCAN: stm32_can.c registers /dev/can0 via stm32_caninitialize() when CONFIG_STM32_CAN_CHARDRIVER is set; stm32_cansock.c calls stm32_cansockinitialize() for the socket-CAN path when CONFIG_STM32_CAN_SOCKET is set.
Signed-off-by: Alexey Matveev <tippet@yandex.ru>
This commit adds an entry for the ESP32-P4-Function-EV-Board's
`psram_usrheap` defconfig on docs.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Added stm32_usbdrdhost.c which adds USB FS host mode support using the
embedded PHY. Added Kconfig to select Device or Host.
Example config nucleo-h563zi:usbmsc added to test functionality
Signed-off-by: daniellizewski <daniellizewski@geotab.com>
Document the new mkpasswd-based password generation system and its
integration with the build process.
Changes:
* Add comprehensive mkpasswd tool documentation to components/tools
* Update SIM board docs to explain generated passwd workflow
* Update ESP32-C3-legacy board docs for passwd generation
* Update RX65N board docs with credential handling guidance
* Document how to configure and use BOARD_ETC_ROMFS_PASSWD_* options
* Explain security benefits of build-time generation vs static files
* Update all doc examples from default username "admin" to "root"
BREAKING CHANGE: Boards using static /etc/passwd files in ETC_ROMFS
must migrate to the new build-time generation workflow documented in
Documentation/components/tools/index.rst. The old static passwd files
are no longer present in migrated boards; boards that relied on them
will fail to build until credentials are configured via Kconfig.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
This commit documents the power management defconfig for the
ESP32-P4-Function-EV-Board.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
