Commit graph

23655 commits

Author SHA1 Message Date
Serg Podtynnyi
e5bf4fc5c4 arch/arm/rp23xx: xosc: Update startup delay calculation
Use upstream function to calculate XOSC startup delay

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-16 23:07:18 +08:00
Martin Vajnar
a3d0411c24 Select SENSORS_QENCODER as dependency for Quadrature Encoder mode of PCNT unit 2025-05-16 11:10:29 -03:00
Martin Vajnar
abac610d13 xtensa|espressif: Unify Quadrature Encoder handling among units 2025-05-16 11:10:29 -03:00
Theodore Karatapanis
fcbd3099aa arch/arm64/imx9: Extend ELE API with RNG support
- Add ELE command to initialize the ELE RNG context.
- Add ELE command to poll the readiness of the RNG
- Add ELE command to obtain random numbers.
- Replace AHAB_ prefixes with ELE_
- Cleanup header includes
- Added some explanatory comments on .../hardware/imx9_ele.h

Signed-off-by: Theodore Karatapanis <tkaratapanis@census-labs.com>
2025-05-16 06:30:18 -03:00
michal matias
e115c4364e arch/risc-v/src/common/espressif/esp_pcnt.c: counter accumulation fix
Even when enabled, the PCNT counter doesn't accumulate into the 32-bit value.
Instead, a value in range [PCNT_LOW_LIMIT, PCNT_HIGH_LIMIT] is always returned.
This is due to interrupt events associated with limit overflows are disabled on the periphery,
therefore the ISR responsible for the accumulation never gets called.

Fixed by enabling the associated interrupt events.

Signed-off-by: michal matias <mich4l.matias@gmail.com>
2025-05-16 10:36:00 +08:00
Lars Kruse
4568110d63 fix misspelled names in locally scoped code
These misspelled words are used in strictly local scopes.
Renaming these variables should not cause any problems.
2025-05-15 10:12:12 +08:00
Eren Terzioglu
ea8744631a arch/xtensa: Update common layer version for esp32s3
Update common layer version for esp32s3 to fix warnings when building

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-14 19:38:21 +02:00
Eren Terzioglu
e9e3a0ecf7 arch/xtensa: Add dedicated GPIO support for esp32[-s2|-s3]
Add dedicated GPIO support for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-14 19:38:21 +02:00
Eren Terzioglu
b7bbb56338 arch/risc-v: Add Dedicated GPIO support for esp32[c3|c6|h2]
Add Dedicated GPIO support for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-14 19:38:21 +02:00
p-szafonimateusz
cc5d6fcb41 arch/sim/Kconfig: fix codespell issues
arch/sim/Kconfig: fix codespell issues

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-05-14 21:50:15 +08:00
p-szafonimateusz
df76246c03 arch/sim/Kconfig: simulated CAN depends on LINUX host
simulated CAN depends on LINUX host now

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-05-14 21:50:15 +08:00
simbit18
ea47f0cf42 [Kconfig]: Fix Kconfig style
Remove spaces from Kconfig files
Add comments
Add TABs

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-05-14 21:15:14 +08:00
Serg Podtynnyi
3966097453 arch/arm/src/rp23xx: allow to use armv8m systick lowerhalf
Add ability to use arv8m systick lowerhalf driver
Fix wrong macro for systick current register in initialize

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-14 21:14:45 +08:00
Serg Podtynnyi
6fc7f53f46 arch/arm/rp23xx: wdog: Ensure setup before register phase
The watchdog auto-monitor sets up during the register phase,
so we should be prepared before calling register.

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-14 07:18:46 -03:00
p-szafonimateusz
5bf3110777 arch/sim/sim_canchar.c: notify upper-half driver that tx done
add missing can_txdone() callback after message is send

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-05-14 03:05:56 +08:00
Jukka Laitinen
e78a33464e arch/sim/src/sim/sim_oneshot.c: Fix spelling in comments, "Ths" -> "This"
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-05-13 21:05:12 +08:00
Jukka Laitinen
bf870e51ba arch/sim/sim_oneshot: Calculate next oneshot time in ticks instead of timespec
This removes drift in tick start times, when the base time is always rounded to
tick boundary.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-05-13 21:05:12 +08:00
buxiasen
5d9a1aaf75 armv7a/mmu: update from l1entry replace to TTBR0 update
The l1entry replace cause huge time when text/data is big,
Need 16KB per task to hold l1table.
Also critical_section no longer required, as table per-task maintained.

For complex goldfish emulator scarios can speed up:
     enter_nsh/application_init_done,
from 23.517300/05:07.067500
to   01.501500/00:06.587300
at least 10 times faster.

As we don't have do x_NPAGES swap out etc.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
7b90b78b52 arch/arm/mmu: unify all uint32_t & uintptr_t
Only keep cp15 API use uint32_t, other mmu all use uintptr_t

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
68008aa9d7 arch/arm/armv7-a: add mmu_l1_setpgtable
Decrease the direct access of cp15, use mmu interface replace

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
94ea4efe4c arch/arm/arm-v7a: fix comment typo
Catched by codespell

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
cd7a8f73eb comments: update text typo pre-empted to preempted
Or will be catch by codespell, when do checkpatch.sh

Also fix the relative comment file changed.

include/nuttx/scsi.h
drivers/syslog/ramlog.c
excluded as we have to modify field name in struct

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
172c707a02 arch/arm/arm_cache: remove not required critical_section
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
cdbe91aeb9 armv7a: rename and implement va2pa & pa2va
Notice: the up_addrenv_pa_to_va is not correct, it will be complex if we
search all address to lookup all virtual address according to physical
address.
Use up_addrenv_x method as common interface across va & pa

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
d00ee139f9 arch/arm/src: fix warning of up_addrenv_va_to_pa
chip/sam_memories.c: In function 'sam_physramaddr':
chip/sam_memories.c:936:14: warning: implicit declaration of function 'up_addrenv_va_to_pa' [-Wimplicit-function-declaration]
  936 |       return up_addrenv_va_to_pa((FAR void *)virtramaddr);
      |              ^~~~~~~~~~~~~~~~~~~

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
wangzhi16
4e4acce514 arch/arm: fix compile error.
BUILD CMD: ./tools/configure.sh -l sama5d3x-ek/nx; make -j`nproc`

chip/sam_memories.c:705:17: note: each undeclared identifier is reported only once for each function it appears in
 chip/sam_memories.c:706:27: error: 'CONFIG_SAMA5_DDRCS_PGHEAP_SIZE' undeclared (first use in this function); did you mean 'CONFIG_SAMA5_DDRCS_HEAP_SIZE'?
 706 | poolend = poolstart + CONFIG_SAMA5_DDRCS_PGHEAP_SIZE;
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 | CONFIG_SAMA5_DDRCS_HEAP_SIZE
 make[1]: *** [Makefile:168: sam_memories.o] Error 1
 make[1]: Target 'libarch.a' not remade because of errors.
 make: *** [tools/LibTargets.mk:170: arch/arm/src/libarch.a] Error 2
 make[1]: Target 'libsched.a' not remade because of errors.
 make: *** [tools/LibTargets.mk:71: sched/libsched.a] Error 2
 make: Target 'all' not remade because of errors.
 ~/nuttx/tools/testbuild.sh: line 385: ~/nuttx/../nuttx/nuttx.manifest: No such file or directory

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2025-05-12 15:01:37 +08:00
buxiasen
fb221e4d0d sama5/memory: align va&pa method to up_addrenv_x
Align prototype and make more easy to understand.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-05-12 15:01:37 +08:00
EmomaxD
d611304d61 style: fix typos in comment.
- Corrected the typo in the comment of the arch/arm/src/arm/arm_cache.S file.
- Standardized the cache terminology, changing "D-cache" and "I-cache" to "Dcache" and "Icache" for consistency with existing code style.

Signed-off-by: EmomaxD <emreleno@gmail.com>
2025-05-10 12:02:23 +08:00
Serg Podtynnyi
185c55e16d arch/arm/rp23xx: remove spinlock from up_txint
spin lock/unlock introduced before sometimes got stuck on tx

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-09 19:21:51 +08:00
Theodore Karatapanis
0011f165ff style: fix typos required by ci-cd
- Added "infor" to .codespellrc ignore-words-list.
  This term is used by NXP's ROMAPI naming conventions and is not a typo
  in this context.
- This prevents CI/CD codespell checks from failing due to false positives.

Signed-off-by: Theodore Karatapanis <tkaratapanis@census-labs.com>
2025-05-09 19:21:17 +08:00
Theodore Karatapanis
5d63c3e460 arch/arm64: Allow non MMU builds.
MMU initialization is redundant for bootloaders(BL2) that load TF‑A(BL31).
TF-A will ignore and overwrite any MMU configuration performed by BL2.
Additionally the MMU comes with a large memory footprint (~50 KB)
which could be precious for such setups.

When the MMU is disabled all the memory is treated as device memory and
all alignment faults generate exceptions (as opposed to normal memory when
MMU is enabled). For that reason we need to add -fno-builtin when compiling
with CONFIG_ARCH_USE_MMU != y to prevent alignment faults.

- Guard MMU initialization with CONFIG_ARCH_USE_MMU
- If CONFIG_ARCH_USE_MMU is not set add -fno-builtin which prevents alignment errors.
- Deliberately didn't try to replace CONFIG_ARCH_HAVE_MMU with CONFIG_ARCH_USE_MMU
  occurrences, because this will break a lot of build targets that assume MMU without
  guarding the MMU initialization.

Signed-off-by: Theodore Karatapanis <tkaratapanis@census-labs.com>
2025-05-09 19:21:17 +08:00
Theodore Karatapanis
d278c6cb15 arch/arm64/imx9: Add ROMAPI and AHAB support for i.MX9
This adds support for the i.MX9 ROMAPI, allowing boot in a more
device agnostic and portable manner. The ROMAPI "natively" allows to:
- Query the boot device for information.
- Copy data from the boot device to RAM.

An extra functionality was added to ROMAPI to calculate
offsets of sequential AHAB containers.

The AHAB functionality is built on top of raw ELE primitives and allows to:
- Authenticate a container image.
- Release the authenticated container.

Signed-off-by: Theodore Karatapanis <tkaratapanis@census-labs.com>
2025-05-09 19:21:17 +08:00
Theodore Karatapanis
3c48031ec3 arch/arm64/imx9: Extend ELE API for container authentication
This extends ELE API to:
- Authenticate i.MX container header.
- Verify container images.
- Release resources of the authenticated containers.

Signed-off-by: Theodore Karatapanis <tkaratapanis@census-labs.com>
2025-05-09 19:21:17 +08:00
Eren Terzioglu
39465d2156 arch/xtensa: Add SDM peripheral support for esp32[-|-s2|-s3]
Add SDM peripheral support for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-09 19:20:47 +08:00
Eren Terzioglu
466e63d554 arch/risc-v: Add SDM support for esp32[-c3|-c6|-h2]
Add SDM peripheral support for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-09 19:20:47 +08:00
Matteo Golin
81060b6721 rp2040/gpio: Fix debug assertion for interrupts.
The previous interrupt implementation allowed only one single interrupt
mode to be selected. The debug assertion is now updated to allow the
entire range of possible interrupt combinations (a 4-bit field), up to
0xf.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-05-09 15:54:45 +08:00
George Poulios
b103a64a87 drivers/misc/optee: Add SMC backend for arm archs
So far NuttX has supported OP-TEE interfacing over
local and RPMsg sockets. This commit introduces support
for direct invocation of OP-TEE through arm SMCs. The
SMC transport is enabled through CONFIG_DEV_OPTEE_SMC.

This SMC implementation has been tested only with arm64,
OP-TEE rev 4.4.

Note that it does not support reverse direction RPCs,
i.e. from the Secure World to the Normal World to
something like optee supplicant. A basic RPC handling
skeleton is provided with implementation for some
basic functions (alloc/free mem, and foreign interrupts)
but no supplicant command handling.

(+one minor change s/parm/param in arch/arm64/include/syscall
to satisfy the spellchecker during PR)

Signed-off-by: George Poulios <gpoulios@census-labs.com>
2025-05-09 10:29:26 +08:00
Serg Podtynnyi
bc4a52f910 arch/arm/rp23xx: update serial code smp fixes from cxd56
Most of the code is the same, update to recent fixes

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-08 11:39:24 -03:00
Kerogit
1a8fba827a arch/avr/src/avrdx: added support for AVR128DA64 and AVR128DB64 chips
This patch adds definitions for listed chips. No other changes are needed
as the chips are similar to the previously supported AVR128DA28 and all
that is needed is some definitions for extra peripherals.
2025-05-08 15:58:18 +08:00
Kerogit
bf76231f3c boards/avr/avrdx/breadxavr: support for buttons handled by input driver
This patch registers board buttons in input driver as /dev/buttons
and provides functions required by the driver
2025-05-08 15:58:18 +08:00
Kerogit
065910c7d3 arch/avr/src/avrdx: added I/O interrupt multiplexer
AVR DA/DB family chips have single interrupt vector for all changes
on an I/O port. This poses problem when multiple drivers want to claim
the same interrupt (might happen for example with button and discrete
joystick drivers using pins on the same port.)

The I/O multiplexer solves it by providing interface similar
to irq_attach. However, it allows registration of multiple handlers
for the same interrupt vector with additional information recording
which pins should be serviced by each handler.

Only handler for pins that triggered the interrupt is then called.
2025-05-08 15:58:18 +08:00
Kerogit
821fea2c2b arch/avr/src/avrdx: introduce header file for I/O port constants
Maps letter-marked I/O ports to numbers in alphabetical order.
2025-05-08 15:58:18 +08:00
Kerogit
ca7941eec7 arch/avr/avrdx: added support for serial driver
This patch adds support for using generic serial driver
with AVR DA/DB family of MCUs.
2025-05-08 15:58:18 +08:00
Kerogit
bce6ef6aad arch/avr/avrdx: provide tickless OS option
This patch adds tickless OS support for AVR architecture in alarm mode.
Currently, only devices from AVR DA/DB family are supported.
2025-05-08 15:58:18 +08:00
Kerogit
66f6bb45ab arch/avr/avrdx: initial support for AVRnDx chips
Initial support adds chip specific files like Kconfig, flags for the compiler,
and basic functionality like system timer. Some files are stubs derived
from corresponding ATmega files but without the functionality they are
supposed to add (to be done in later patches)

Part of the work is altered copies of corresponding files for ATMega MCUs.

Initially supported is AVR128DA28.
2025-05-08 15:58:18 +08:00
Kerogit
100bbe620e arch/avr: make the linker obey DEBUG_LINK_MAP
This patch adds -Map linker flag to Toolchain.defs for AVR.
2025-05-08 15:58:18 +08:00
Kerogit
290f09934d arch/avr: enable eliminating unused sections with GCC
This patch marks host GCC toolchain option with ARCH_TOOLCHAIN_GCC,
enabling various other settings depending on it. One of the enabled
settings is DEBUG_OPT_UNUSED_SECTIONS.

This patch also adjusts compiler and linker flags based on the value
of DEBUG_OPT_UNUSED_SECTIONS so unused sections are removed
2025-05-08 15:58:18 +08:00
Kerogit
3b39101c82 arch/avr: decouple enabling of IOBJ/IPTR qualifiers from debugging
These qualifiers are useful on their own, not only when debugging-related
strings are flagged with them
2025-05-08 15:58:18 +08:00
Serg Podtynnyi
e54d5fffd6 arch/arm/rp23xx: add missing fpu init for smp cores
On SMP systems we should enable FPU on each core

FPU extenstion support must be enabled on each core as stated on 4.6.5
arm m33 devices generic user guide

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-07 22:03:15 -03:00
Serg Podtynnyi
7c203a96af arch/arm/rp23xx: update USB PLL/VCO/FBDIV and usb setup
RP2350 datasheet and upstream pico-sdk suggests higher VCO freq to
better output stability.
Increase the VCO and update PLL divs according to specs and calculation.
Higher VCO freq is more stable, lower VCO freq is more power friendly.
Also it's possible to use 120/6/5 with VCO 1440MHz for USB PLL to even
higher output stability.
USB setup changes from rp2040
Must clear the MAIN_CTRL.PHY_ISO bit at startup and after power down
events.

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-05-08 03:02:06 +02:00