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462 commits

Author SHA1 Message Date
Jiuzhu Dong
7a6a1c1f42 fs: allocate file/socket dynamically 
MIRTOS-273

Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-03-17 21:15:26 +08:00
chao.an
9c946e2af6 make/archive: replace the dependency to preprequisite list 
Change-Id: Id63f3cd32906461a54cb016ef8078d4d922845e2
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-03-01 21:10:15 +08:00
ligd
0fe5ec8a48 sigdeliver: fix system block when kill signal to idle in SMP 
Bug description:

CONFIG_SMP=y

Suppose we have 2 cores in SMP, here is the ps return:

PID GROUP CPU PRI POLICY TYPE    NPX STATE     STACK   USED  FILLED COMMAND
  0     0   0   0 FIFO   Kthread N-- Assigned 004076 000748  18.3%  CPU0 IDLE
  1     0   1   0 FIFO   Kthread N-- Running  004096 000540  13.1%  CPU1 IDLE

nsh> kill -4 0
or:
nsh> kill -4 1

system blocked.

Reason:

In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.

Fix:

Add condition to cover saved_irqcount == 0.

Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-01-21 16:56:44 +08:00
ligd
87694f68a7 mqueue: add file_mq_xx for kernel use 
Change-Id: Ida12f5938388cca2f233a4cde90277a218033645
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-01-08 14:31:37 +08:00
chao.an
70213704ec arch/netdev: try tcp timer in every txavail call 
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().

This patch is mainly to improve the performance of TCP handshake and wavehand.

Change-Id: Ic965a9fa26895f0d8e70368558f5bfbafdea7f58
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-15 21:41:29 +08:00
chao.an
90dc86655c style/Makefile: remove unnecessary trailing whitespace 
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-11-30 11:20:05 +08:00
Masayuki Ishikawa
b237748f50 Revert "arch: xtensa: Fix the pause handler for SMP" 
This reverts commit 1914aac05f.
 2020-11-25 00:02:37 +01:00
YAMAMOTO Takashi
a24f66f31f arch/xtensa/src/esp32/esp32_spi.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
YAMAMOTO Takashi
2aced358a8 arch/xtensa/src/esp32/esp32_wtd_lowerhalf.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
Alan C. Assis
31c14726d5 Replace all assert() with DEBUGASSERT() 2020-11-22 07:43:04 -08:00
Alan C. Assis
3352d3863c esp32_himem: Fix issue that was preventing to map all free memory 2020-11-22 07:43:04 -08:00
Matias N
d5b6ec450f Parallelize depend file generation 2020-11-22 09:02:59 -03:00
Abdelatif Guettouche
fc5874ad75 arch/xtensa/src/common/xtensa_createstack.c: Fix stack alignement. 
The required stack alignement is 16 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
56198992e5 arch/xtensa/src/common/xtensa_windowspill.S: Remove the #if 0 to include 
the spill function.  It's now needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
f80ed10f97 arch/xtensa/src/esp32/chip_memory.h: Chip implementation of memory test 
functions needed by the arch.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
9d28687b6f arch/xtensa: Print backtrace on assertions. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Masayuki Ishikawa
1914aac05f arch: xtensa: Fix the pause handler for SMP 
Summary:
- Apply the same logic added to cxd56_cpupause.c

Impact:
- SMP only

Testing:
- Tested with esp32-core:smp (QEMU)
- Run smp and ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-11-20 00:49:25 -08:00
Abdelatif Guettouche
79b07e6c94 arch/xtensa/src/esp32/esp32_gpio.c: Fix GPIO IRQ assert condition. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-19 07:38:59 -08:00
YAMAMOTO Takashi
b8e559bb2e xtensa: Add _intmax_t and _uintmax_t 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
c18f074830 xtensa: Change _int32_t from long to int to match the compiler 
PRIx32 etc is already "x" etc.
 2020-11-19 00:49:56 -08:00
Alan C. Assis
50e1a49c6e Fix the SPIRAM_BANKSWITCH that was defined incorrectly 2020-11-18 22:21:53 +01:00
Alan C. Assis
f09d103528 xtensa/esp32: Add high memory support to work with PSRAM 2020-11-18 22:21:53 +01:00
Abdelatif Guettouche
2d7e063eb0 arch/xtensa/src/esp32/esp32_tim.c: Fix build when debug is enabled. 
A non-existent variable was used.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-17 18:46:06 -08:00
YAMAMOTO Takashi
95a3db7629 arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
dbb81dfd5d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a printf format 2020-11-16 08:29:00 -08:00
Sara Souza
e6b6f06d22 xtensa/esp32: added support to automonitor by capture 2020-11-13 13:01:40 -03:00
Dong Heng
bfb5214ef8 xtensa/esp32: Add SPI Flash hardware encryption I/O support 2020-11-13 08:37:59 +01:00
Sara Souza
b9d44017cf xtensa/esp32: Watchdog support (MWDTs) 2020-11-08 13:05:24 -03:00
Abdelatif Guettouche
2ac2ce55d2 arch/xtensa/src/esp32/esp32_allocateheap.c: Fix the memory regions with 
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-06 18:36:41 -03:00
Alan C. Assis
2f612a2077 xtensa/esp32: Move #if defined(SPIRAM) to inside function 2020-11-06 16:19:48 +01:00
Alan C. Assis
d11f02d772 xtensa/esp32: Fix remaining SEPARATE typo 2020-11-06 16:19:48 +01:00
Alan C. Assis
6c37d9ff80 xtensa/esp32: Avoid init PSRAM when SPIRAM is not enabled 2020-11-06 16:19:48 +01:00
YAMAMOTO Takashi
6bc93b87b0 xtensa inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00
Dong Heng
483b145f3b xtensa/esp32: Fix rt-timer issues 
1. function "stop" should really stop repeat timer
2. delete timer really in rt-timer task to avoid resource being broken
3. timer triggers when stopping/deleting it and skip it in ISR
 2020-11-04 09:24:59 -03:00
Dong Heng
b54f0edff4 xtensa/esp32: Add Partition and OTA device 2020-11-03 21:54:07 +01:00
Dong Heng
c90697f193 xtensa/esp32: SPI Flash driver uses global sem for all MTD 
Because all MTDs operate the main SPI Flash, so not only MTD internal
function should be mutex, but also MTDs should be mutex.
 2020-11-03 09:04:02 -03:00
Juha Niskanen
a01a01ab45 arch: spi: fix typos and run nxstyle 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2020-10-31 10:40:41 -07:00
Dong Heng
a12a79fdb3 xtensa/esp32: Fix SPI master DMA RX buffer memcpy size error 2020-10-29 11:51:05 +01:00
Dong Heng
d86fd84a8e xtensa/esp32: Add real-time timer support for WiFi 2020-10-27 10:36:34 -03:00
Abdelatif Guettouche
58655d1efd arch/xtensa/src/esp32: SMP case of interruptstack. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
c97d11aa7b arch/xtensa: Add the optional interrupt stack. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should 
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
34ad33c8b2 arch/xtensa/Kconfig: Add help for the seperate internal heap. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
5ac5655fa4 arch/xtensa/src/esp32/esp32_spi&spiflash: Free the correct buffer. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0182e6e8bb arch/xtensa/src/commin/xtensa_usestack&createstack.c: Set the alignment 
to be 4 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
172896728f arch/xtensa/src/esp32/esp32_spi.c: Instead of returning with no error 
code, assert the return of the imm_malloc function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
2fa5d65355 arch/xtensa/src/common: Refactor the mm_ macros into a separate file. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7db8b920ff arch/xtensa/src/esp32/hardware: PIN_CTRL was defined twice. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0ba0a3a092 arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00