Commit graph

24393 commits

Author SHA1 Message Date
simbit18
84a512759d arch/arm/src/sama5: CMake build implemented for Microchip's SAMA5 Family
- added Microchip's SAMA5 Family

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-27 16:33:00 -05:00
taoliu
e3b1e5914e arch/arm/src: Add necessary conversion between tick and usec for tickless
When testing tickless scheme with default arm_systick.c, we found the
count writed to systick register is too smaller the expected, just the
ticks not count, and os runing abnormally with too much interrupter.
Add necessary coversion, then system run well.

Signed-off-by: taoliu <taoliu@asrmicro.com>
2026-02-27 14:08:51 +01:00
zhenwei fang
f0fc695a81 arch/sim: fix warning ‘sim_buttonmap’ defined but not used
N/A

Signed-off-by: zhenwei fang <fangzhenwei@bytedance.com>
Signed-off-by: chao an <anchao.archer@bytedance.com>
2026-02-27 19:54:46 +08:00
xingrentai.1
bf83ff3fbd arch/sim: guard X11 touchscreen events with CONFIG_SIM_TOUCHSCREEN
The X11 event loop in the POSIX simulator was processing MotionNotify
(touch/mouse movement)and ButtonPress/ButtonRelease events unconditionally,
even when the touchscreen feature(CONFIG_SIM_TOUCHSCREEN) was disabled.

This could lead to unnecessary event processing, potential compiler warnings
about unusedfunctions (e.g., sim_buttonevent), or unintended behavior in simulator
builds withouttouchscreen support. The touchscreen-related event handling should
only be active whenthe corresponding configuration is enabled.

This fix wraps the MotionNotify and ButtonPress/ButtonRelease event handling
logicwith #ifdef CONFIG_SIM_TOUCHSCREEN guards to:

1. Ensure touchscreen/mouse event processing is only compiled when CONFIG_SIM_TOUCHSCREEN is enabled.
2. Eliminate unused code warnings in non-touchscreen simulator builds.
3. Align event loop behavior with the configured feature set, reducing unnecessary runtime overhead.

The change maintains full touchscreen functionality when the config is enabled, whilecleaning up the
code path for builds that don't require touchscreen support.

Signed-off-by: chao an <anchao.archer@bytedance.com>
2026-02-27 19:54:46 +08:00
xingrentai.1
ee3e931812 arch/sim: fix X11 framebuffer window not visible in POSIX simulator
The X11 framebuffer implementation in the POSIX simulator was creating a window
and graphics context but failing to map (display) the window to thescreen with XMapWindow().

This omission meant the framebuffer window would be created in the X11server but remain hidden,
making it impossible to see any graphics outputfrom the simulator. The window existed in the X11
server's state but wasnot rendered to the screen.

This fix adds the missing XMapWindow(display, g_window) call aftercreating the graphics context, which:
1. Maps the created X11 window to the screen (makes it visible).
2. Ensures framebuffer output is rendered to the display as expected.
3. Maintains compatibility with existing X11 framebuffer logic.

The change restores basic visibility of the simulator's framebuffer window,
fixing a critical usability issue for graphics-related testing in the POSIX simulator.

Signed-off-by: chao an <anchao.archer@bytedance.com>
2026-02-27 19:54:46 +08:00
Tiago Medicci Serrano
18be6955c6 arch/xtensa/src/common: Create SoC-specific initialization routine
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-02-27 08:12:19 -03:00
Tiago Medicci Serrano
ba20c930f8 arch/risc-v/src/common: Create SoC-specific initialization routine
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-02-27 08:12:19 -03:00
Chip L.
6cb6c45987 arch/xtensa/esp32: Fix buffer overflow in SPI poll exchange
The esp32_spi_poll_exchange() function previously used a hardcoded
length of sizeof(uint32_t) (4 bytes) for memcpy() operations and
pointer increments, disregarding the actual remaining transfer_size.

When an SPI transaction involved a data length not aligned to 4 bytes
(such as a 1-byte payload commonly used in sub-GHz radio drivers),
the driver forced a 4-byte memory transfer. This caused out-of-bounds
reads and writes, leading to stack smashing and fatal CPU exceptions
(e.g., EXCCAUSE=0000).

This patch resolves the memory corruption vulnerability by:
1. Calculating a precise `chunk` size for each iteration, strictly
   bounded by the remaining `transfer_size`.
2. Limiting the memcpy() operations and the subsequent pointer
   increments (tp and rp) to this exact chunk size.
3. Zero-initializing the temporary TX register (w_wd) before copying
   to clear padding and prevent reading uninitialized memory.
4. Adding a NULL check for the receive pointer (rp) prior to the
   memcpy operation to prevent unintended memory writes.

Signed-off-by: Chip L. <chplee@gmail.com>
2026-02-27 08:10:46 -03:00
fangzhenwei
e4ed6156ca arch/sim: fix incomplete HCI socket data reading in simulator interrupt handler
The sim_bthcisock_interrupt() handler for Bluetooth HCI sockets in the simulatorwas using
an if statement to check for available data on the HCI socket. Thismeant that only a single
packet would be read and processed per interrupt trigger,even if multiple packets were waiting
in the socket buffer.

This led to incomplete data processing: unread packets would remain in the bufferuntil the next
interrupt tick, causing delayed handling of Bluetooth HCI events/commands,packet backlogs,
or missed data in high-throughput scenarios.

This fix replaces the if with a while loop to:

1. Continuously check for and read available data from the HCI socket until no more
   packets are present in the buffer.
2. Ensure all pending HCI packets are processed in a single interrupt handler invocation.
3. Eliminate packet backlogs and reduce latency in Bluetooth HCI communication.

The change maintains the same core data reception logic (bthcisock_receive()) butensures it runs
for all available packets, improving the reliability and responsivenessof the simulator's Bluetooth HCI socket implementation.

Signed-off-by: chao an <anchao.archer@bytedance.com>
2026-02-26 08:15:28 -03:00
yinshengkai
e62e245f64 arm64/cmake: fix typo in CMAKE_STRIP flag
Typo in CMAKE_STRIP option (strl dunneeded -> strip-unneeded).

Signed-off-by: yinshengkai <yinshengkai@bytedance.com>
2026-02-26 12:12:35 +01:00
simbit18
49b2e7d6a6 arch/arm/src/stm32wl5: CMake build implemented for STM32 STM32WL5
- added STMicroelectronics STM32WL5

Signed-off-by: simbit18 <simbit18@gmail.com>

Update CMakeLists.txt

Update CMakeLists.txt
2026-02-26 06:20:41 +08:00
Matteo Golin
2d768c294e arch/delays: Invalid default value for BOARD_LOOPSPERMSEC
Changes the default value for CONFIG_BOARD_LOOPSPERMSEC to -1, which is
invalid. All boards that forget to configure this value will encounter a
static assertion at compile time, enforcing that configurations
upstreamed to NuttX have calibrated values for correct delay timings.

Boards which implement ALARM_ARCH or TIMER_ARCH do not rely on the
busy-loop delay implementation and thus only have a run-time check to
ensure proper delay-timings (in the case where delays are used before
the alarm/timer driver is registered).

Some boards already in the NuttX upstream do not have calibrated values,
but there are no users who currently own the board to submit a
calibrated value for the configurations to use. In this scenario, the
value is temporarily set to 0 and a warning is displayed so that users
of these boards are informed of the calibration process.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-02-25 15:00:03 -03:00
simbit18
6f92e14e81 arch/arm/src/a1x: CMake build implemented for Quicklogic EOS S3
- added Quicklogic EOS S3

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-25 06:47:58 +08:00
simbit18
c6c9876227 arch/arm/src/a1x: CMake build implemented for Allwinner A1X family
- added Allwinner A1X family

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-24 21:40:48 +08:00
Eren Terzioglu
90147a72c2 arch/xtensa/espressif: Fix SHA errors
Fix SHA errors for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-02-24 12:57:46 +01:00
Eren Terzioglu
19b6e15dbd arch/risc-v/espressif: Fix SHA errors
Fix SHA errors for esp32[-c3|-c6|-h2]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-02-24 12:57:46 +01:00
Vlad Pruteanu
4775f5ba21 xtensa/esp32: Fix HMAC-SHA when a long key is used
When using a key that is longer than the block size of the hashing
algorithm used, the key must be hashed before it is used.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-02-24 08:32:19 -03:00
simbit18
6b621999d9 arch/arm/src/stm32l5: CMake build implemented for STM32 STM32L5 Series
- added STM32 STM32L5 Series

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-23 22:12:48 +08:00
Maarten Zanders
65207ae1c5 serial/uart_rpmsg: add _raw version of driver
Mainline Linux doesn't use data encapsuation or flow control in its
tty_rpmsg driver. Create a NuttX counterpart which matches this
implementation.
This driver uses the static "rpmsg-tty" name to connect with the
remote service.

Signed-off-by: Maarten Zanders <maarten@zanders.be>
2026-02-23 09:19:57 -03:00
Ari Kimari
966be68259 arch/imx9/enet: Add MII clock calculation
Add MII clock calculation from root clock
Remove MII clock divider define

Signed-off-by: Ari Kimari <ari.kimari@tii.ae>
2026-02-21 07:51:44 +08:00
simbit18
12d4f385bd arch/arm/src/stm32wb: CMake build implemented for STM32 STM32WB Series
- added STM32 STM32WB Series

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-21 07:25:40 +08:00
Maarten Zanders
643f33934e arch/arm: remove all "select ARMV8M_HAVE_STACKCHECK".
Stack checking is not optional on armv8m. This config
option does not exist.

Signed-off-by: Maarten Zanders <maarten@zanders.be>
2026-02-20 13:17:22 -05:00
Filipe Cavalcanti
293d33f5dd arch/xtensa/esp32: select I2C_DRIVER on I2C
Automatically select I2C_DRIVER when ESP32_I2C is selected.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
simbit18
53fd998502 arch/arm/src/samd5e5: CMake build implemented for Microchip's SAM D5x/E5x Family
- added Microchip's SAM D5x/E5x Family

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-19 15:08:42 -03:00
Atsunori Saito
fc1ae9b7be imxrt/lpspi: Fix correct LPSPI DMA transfer size for 16-bit
- Fix byte count calculation for 16-bit SPI words
  using shift-by-1 instead of shift-by-2
- Use word count instead of byte count for DMA
  iteration config on both RX and TX channels

Signed-off-by: Atsunori Saito <sai@yedo.com>
2026-02-18 09:19:22 -03:00
Jukka Laitinen
79730c83ca arch/imx9: Increase uSDHC root clock to 400MHz
This is the nominal speed according to the TRM, and using higher
root clock gives more frequency selections (possible dividers) for
the SD card clock configuration.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-02-16 10:52:04 -05:00
Jukka Laitinen
191575eac1 imx9: Add proper initialization of the SD card with different bus speeds
- Change the board's sd-card speed configuration to just specify the wanted frequency
- Calculate the proper divisors in the driver
- If the sd card frequency exceeds 25 MHz, set the card to high-speed mode

This makes it easier to adjust the operating speed of the sd cards and fixes an error
where cards are being operated in standard mode at over 25MHz speeds. If the speed
is higher than 25MHz, the card needs to be set into high-speed mode.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-02-16 10:52:04 -05:00
Jukka Laitinen
b4ccaf4b1c arch/imx9: Fix uSDHC driver DMA and cache compilation flags
All combinations of CONFIG_IMX9_USDHC_DMA and CONFIG_ARM64_DCACHE_DISABLE
are valid. Only the required alignment of the DMA buffers are different,
If the cache is enabled, cacle-line aligned buffers need to be used.
Otherwise, the USDHC DMA alignment requirement is just 32-bits.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-02-16 10:52:04 -05:00
SPRESENSE
72b67832ea Makefile: Remove make depend files by make distclean
Intermediate files of make depend like .ddc and .dds may remain
when make is interrupted. Remove them using make distclean.

Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
2026-02-16 16:27:57 +01:00
simbit18
5e12faea50 arch/arm/src/sam2l2: CMake build implemented for Microchip's SAM D/L Family
- added Microchip's SAM D/L

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-13 17:40:55 -03:00
simbit18
bd699a47af arch/arm/src/sam34: CMake build implemented for Microchip's SAM3 SAM4 Family
- added Microchip's SAM3 SAM4 Family

Signed-off-by: simbit18 <simbit18@gmail.com>

Update CMakeLists.txt

Update CMakeLists.txt
2026-02-12 16:09:20 -03:00
donghaokun
cbe13affa1 arch/tricore: initialize spinlock used by tricore systimer
Add explicit spin_lock_init in tricore_systimer_initialize() for the lock used by tricore systimer.

Signed-off-by: Haokun Dong <donghaokun@lixiang.com>
2026-02-11 11:28:52 -03:00
buxiasen
255618d838 imx95: add board reset
We suppose to use up_systemreset for nsh reboot command.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-02-11 14:10:18 +01:00
buxiasen
8cff78cadf arm64/chip/imx9: add cmake support
We should prefer cmake for better compile speed.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-02-11 14:10:18 +01:00
vrmay23
6da5100bc0 arch/stm32h7: fix FDCAN clock, ILS register and extended ID
Fix three issues in the STM32H7 FDCAN SocketCAN driver:

1. Clock configuration: Allow board.h to override STM32_FDCANCLK.
   Previously the driver hardcoded STM32_HSE_FREQUENCY, ignoring
   any board-specific clock configuration.

2. ILS register bug: Fix putreg32 call that was writing FDCAN_ILS_TCL
   constant instead of the computed regval, causing interrupt routing
   issues.

3. Extended ID filter size: Increase n_extid from 64 to 128. Despite
   the reference manual (RM0433) suggesting 64 max, testing shows
   that 128 is required for reliable extended ID frame reception.
   With 64, some extended ID frames were silently dropped.

Signed-off-by: Vinicius May <vmay.sweden@gmail.com>
2026-02-10 08:34:25 -03:00
yaojingwei
c5549143ad sim_camera: support enum pixel format.
Expose enum pixel format support in sim_camera.

Signed-off-by: yaojingwei <yaojingwei@xiaomi.com>
2026-02-09 20:56:46 -03:00
simbit18
b4be9a495a arch/arm/src/s32K3xx: CMake build implemented for NXP S32K3 Family
- added NXP S32K3 Family

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-02-06 15:27:50 -03:00
liang.huang
1653db7ddc riscv: Fix page table traversal for SV39
With CONFIG_PAGING enabled and the RISC-V SV39 MMU active, the page fault
handler incorrectly tracked page table levels: `ptprev` pointed to the L1
page table while `ptlevel` indicated L2. This inconsistency caused faulty
virtual address resolution.

This commit fixes the traversal logic to ensure consistent level tracking
across all three page table levels (L1–L3), enabling reliable page fault
handling and on-demand paging.

Additional changes:
- Set PGT_L3_SIZE to 2048 to enable mapping up to 8MB of address space.
- Update knsh_paging config to avoid crashes caused by excessive memory
  alignment requirements.
- Add knsh64_paging config to verify this commit works as expected.

Signed-off-by: liang.huang <liang.huang@houmo.ai>
2026-02-04 11:52:04 -03:00
wangmingrong1
0832cdca1c toolchain/arm/clang:Update clang compilation specifications
Delete the specified --config, clang can automatically find the library file through the set -march, -mcpu, and -mfpu
Otherwise, different versions of clang support different special cfg settings.

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2026-02-04 02:33:36 +08:00
tengshuangshuang
ac36320158 arm64: Add kmalloc header for arch timer
Include nuttx/kmalloc.h in arm64_arch_timer.c to fix missing header
dependency. This ensures proper memory allocation functions are
available for the architecture timer implementation.

Signed-off-by: hongfengchen <hongfengchen@xiaomi.com>
2026-02-03 11:45:31 -05:00
hujun5
29e514b276 clock: Correct the usage of atomic64_t atomic functions
Replace CONFIG_SYSTEM_TIME64 conditional atomic64 operations with a unified
seqlock-based approach for managing the system tick counter. This simplifies
code by eliminating architecture-specific branches and provides more robust
thread-safe access patterns.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-02-03 10:18:11 +08:00
hujun5
63aefd9975 arch/armv7-r: userspace PMU access
This change enables performance monitoring unit (PMU) access from userspace
on ARMv7-R architecture by adding CONFIG_ARCH_HAVE_PERF_EVENTS_USER_ACCESS
support and building PMU code for userspace when needed.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-02-02 16:20:39 +01:00
cqb
cb2a3ed83e arch/x86: fixed errors in gdt_flush and idt_flush
This commit fixes logic errors in both GDT and IDT flushing mechanisms for the x86 platform.

Signed-off-by: cqb <cqb@sideways.engineering>.
2026-02-02 22:58:02 +08:00
wangzhi16
a2e8a5464e arch/xtensa: replace critical_section with spinlock.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
wangzhi16
4de188cbed arm64/common: Critical Section Optimization.
Replace critical_section with spinlock.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
wangzhi16
a53d58c5c3 arm/phy62xx: Critical Section Optimization.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
wangzhi16
44f2f6f8f1 arm/rtl8720c: Critical Section Optimization.
Replace critical_section with spinlock or mutex.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
cqb
7b1e9eb8bc arch/x86_64: replaced loop construct with rep movsb
Replaces inefficient loop construct with rep movsb string instruction.

Signed-off-by: cqb <cqb@sideways.engineering>
2026-02-02 13:58:10 +08:00
zhanghongyu
a7567677a8 netdev_driver: add carrier_on to xxx_ifup where carrier_on is absent
since the judgment for network card selection was changed from IS_UP to
IS_RUNNING, drivers that lack carrier_on need to add the carrier_on
operation; otherwise, network access issues will occur.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-02-02 13:23:05 +08:00
wangmingrong1
95ef6753ad arm64/irq.h: Fix the issue of including incorrect order
<nuttx/irq.h> will use the macros defined in <arch/chip/irq.h>, so the include order should be after it

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2026-02-02 11:13:21 +08:00