reason:
Since the scheduling records have already been moved to the interrupt exit in this submission,
we need to delete the original records' locations.
This commit fixes the regression from https://github.com/apache/nuttx/pull/13651
Signed-off-by: hujun5 <hujun5@xiaomi.com>
From the RISV-V Privileged Spec v1.10 (3.1.14 MIP/MIE):
Only the bits corresponding to lower-privilege software interrupts
(USIP, SSIP), timer interrupts (UTIP, STIP), and external interrupts
(UEIP, SEIP) in mip are writable through this CSR address; the
remaining bits are read-only.
Thus, it is futile to write to the M-mode status bit via the CSR, only
access via RISCV_IPI is valid.
1. support fiq decoding and dispatch
2. replace CONFIG_ARMV8R_DECODEFIQ with CONFIG_ARCH_HIPRI_INTERRUPT
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
fix revoke_low_memory, problem found by Xiangzhen Ouyang.
g_pt_low mapping is removed during revoke_low_memory so we can't access this memory area with 1:1 mapping.
This logic has been broken for a long time, but for some reason it worked without any crash at boot.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
simplify interrupt logic and allow any CPU
to disable interrupt, not only CPU that enabled it.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
up_set_current_regs initially had two functions:
1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).
Currently, we record the context in other ways, so the second function is obsolete.
Therefore, we need to rename up_set_current_regs to better reflect its actual meaning,
which is solely to mark an interrupt.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
1: spin_lock_init and spin_initialize have similar functionalities.
2: spin_lock and spin_unlock should be called in matching pairs.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
up_set_current_regs initially had two functions:
1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).
Currently, we record the context in other ways, so the second function is obsolete. Therefore,
we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
After compilation, when starting nsh, the following crash occurs.
==2500151==Shadow memory range interleaves with an existing memory mapping. ASan cannot proceed correctly. ABORTING.
==2500151==ASan shadow was supposed to be located in the [0x1ffff000-0x3fffffff] range.
==2500151==Process memory map follows:
0x30000000-0x33dd4000 /nuttx/nuttx
To avoid overlaps, change the starting address of the text segment.
Using Ttext-segment=0x30000000 causes a crash when starting the 32-bit SIM.
Using -Ttext-segment=0x50000000 causes a crash when starting the 64-bit SIM.
Setting -Ttext-segment=0x40000000 resolves all issues perfectly.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
profile-generate is used to generate compilation feedback optimization data, not just code coverage data
It will rely on the toolchain library:
nuttx/libs/libc/misc/lib_utsname.c:94:(.text.uname+0x2c): undefined reference to `__gcov_indirect_call_profiler_v4'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x178): undefined reference to `__gcov_indirect_call'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x188): undefined reference to `__gcov_time_profiler_counter'
arm-none-eabi-ld: nuttx/staging/libc.a(lib_utsname.o):(.data..LPBX0+0x30): undefined reference to `__gcov_merge_time_profile'
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Sorry for this commit: 6cd43777c3
This is the real x86-64 modification, and this patch is x86
Fortunately, except for the error in the previous modification, the actual architecture is supported
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
This issue is related to the Arm toolchain for Windows which is available for x86 host architecture only (compatible with x86_64)
Windows (mingw-w64-i686) hosted cross toolchains
AArch32 bare-metal target (arm-none-eabi)
Issue
/bin/sh: line 1: /home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-ar: Argument list too long
On Windows, arm-none-eabi-ar can only accept strings up to a maximum length of 32,768 characters.
We could suppress the 32K include string limitation by setting the CMake variable CMAKE_NINJA_FORCE_RESPONSE_FILE to ON.
This is unfortunately not enough!!! ): In the build phase this error comes out
$ cmake --build build
[2/1025] Building ASM object arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
FAILED: arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
/home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-gcc.exe @arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.rsp -MD -MT arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -MF arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.d -o arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -c /home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S
C:/msys64/home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S:42:10: fatal error: nuttx/config.h: No such file or directory
42 | #include <nuttx/config.h>
| ^~~~~~~~~~~~~~~~
compilation terminated.
The Workround I found to solve this problem is to overwrite
the responsible file flag CMAKE_${lang}_RESPONSE_FILE_FLAG with $DEFINES $INCLUDES $FLAGS
Maybe there is a better solution but this one it works. :)
1. Add kasan compilation options
2. Modify the link process to support symbol tables and kasan global variables cross-border detection
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
Read base frequency from system counter0 and write it
to arm core register. This corrects timers to work properly
Then enable counting.
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
the stub-function entry address is stored in r4, we should branch to the
stub-function with blx r4, not r5
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
/usr/bin/ld: nuttx.rel: relocation R_X86_64_32S against `.rodata' can not be used when making a PIE object; recompile with -fPIE
/usr/bin/ld: failed to set dynamic section sizes: bad value
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
This commit adds register definitions for advanced, basic, and general purpose timers. Formatting convention was taken from the H7 hardware timer header.
These files were copied from a config of pico-sdk 2.0.0.
They provide struct address mapped access to peripherals, along
with register definitions. It also provides some compiler helpers
that are partially used by the port.
Hardware initialization is based refcount, not
spi enable bit and add interface to unitialize bus
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
Add function description for function prototype of `riscv_jump_to_user`
to make it easier to read, and fix some inconsistent comment style in
`riscv_internal.h`.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
