YAMAMOTO Takashi
7f8d0c327b
sim: Add dlsym to nuttx-names.in
...
Fixes the following crash with CONFIG_SIM_SANITIZE=y on Linux.
```
Program received signal SIGSEGV, Segmentation fault.
getpid () at task/task_getpid.c:76
76 task/task_getpid.c: No such file or directory.
rax 0x2feeb4 3141300
rbx 0xc53f83 12926851
rcx 0x6837665ee4c00 1833394399759360
rdx 0x472080 4661376
rsi 0xc53f83 12926851
rdi 0xffffffffffffffff -1
rbp 0x7ffe4cdfe140 0x7ffe4cdfe140
rsp 0x7ffe4cdfe0f0 0x7ffe4cdfe0f0
r8 0xffffffffffffffff -1
r9 0x0 0
r10 0x22 34
r11 0x246 582
r12 0x472080 4661376
r13 0x7ffe4cdfe3e8 140730188162024
r14 0x472080 4661376
r15 0xf60398 16122776
rip 0x4e9b93 0x4e9b93 <getpid+35>
eflags 0x10206 [ PF IF RF ]
cs 0x33 51
ss 0x2b 43
ds 0x0 0
es 0x0 0
fs 0x0 0
gs 0x0 0
#0 getpid () at task/task_getpid.c:76
#1 0x00000000006ad25a in modlib_registry_lock () at modlib/modlib_registry.c:89
#2 0x0000000000c3648d in modsym (handle=0xffffffffffffffff, name=0xc53f83 "mmap") at module/mod_modsym.c:77
#3 0x0000000000c2cd3a in dlsym (handle=0xffffffffffffffff, name=0xc53f83 "mmap") at dlfcn/lib_dlsym.c:149
#4 0x00000000004a0034 in __interception::InterceptFunction(char const*, unsigned long*, unsigned long, unsigned long) ()
#5 0x000000000048181e in InitializeCommonInterceptors() ()
#6 0x000000000048106a in __asan::InitializeAsanInterceptors() ()
#7 0x000000000049b85e in __asan::AsanInitInternal() ()
#8 0x00007f09cfb04ce6 in ?? () from /lib64/ld-linux-x86-64.so.2
#9 0x00007f09cfaf413a in ?? () from /lib64/ld-linux-x86-64.so.2
#10 0x0000000000000001 in ?? ()
#11 0x00007ffe4cdfff56 in ?? ()
#12 0x0000000000000000 in ?? ()
```
2021-03-23 07:27:09 -07:00
Xiang Xiao
6f6a5a7cb2
arch/arm: Fix nxstyle warning in stm32h7/stm32_dma.c
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-23 13:57:31 +01:00
YAMAMOTO Takashi
6797826b84
arch/sim/src/sim/up_hostmemory.c: build fix for older macOS versions
...
I'm still using 10.14 (Mojave) for nuttx related things.
Note: the CI is using 10.15. (Catalina)
2021-03-23 02:48:50 -07:00
Masayuki Ishikawa
083a11a3c3
arch: sim: Fix sim_sigdeliver() for SMP
...
Summary:
- In the previous implementation, signal handling for SMP was done
in a critical section that is not correct
- This commit fixes this issue
Impact:
- signal handling for SMP
Testing:
- Tested with ostest
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-23 00:41:57 -07:00
Abdelatif Guettouche
fcafacb9a3
esp32_allocateheap.c: Adjust the region of the heap coming from the
...
external memory when a BSS section is allowed to reside there.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
cc23bdeca4
boards/xtensa/esp32: Add a section in external memory to hold some BSS
...
data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
David Sidrane
9800256507
stm32h7:DMA BDMA does not auto disabled on completion
2021-03-22 19:50:53 -07:00
YAMAMOTO Takashi
37300a43a5
esp32_part_ioctl: Return -ENOTTY for unknown commands
...
It's traditional to use ENOTTY for this purpose.
Littlefs seems to rely on this behavior for BIOC_FLUSH.
Also, drop the log level.
2021-03-22 19:49:27 -07:00
Nathan Hartman
f83b30bda1
arch/stm32: Fix wrong Kconfig names for STM32G4xxx MCUs
...
arch/arm/src/stm32/Kconfig:
* configs ARCH_CHIP_STM32G431K, ARCH_CHIP_STM32G431C,
ARCH_CHIP_STM32G431R, ARCH_CHIP_STM32G431M, and
ARCH_CHIP_STM32G431V: Fix copy/paste of incorrect
names shown in the Kconfig menu.
2021-03-22 19:47:32 -07:00
Alin Jerpelea
1fdae80321
arch: arm: kinetis: fix nxstyle errors
...
fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
b6a987afe0
arch: arm: imxrt: nxstyle fix
...
nxstyle is complaining that the headers are defines outside
Included Files section and we have to duplicate the definitions
to the imported files to avoid build errors.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
881cfe4b70
arch: arm: kl: fix Mixed case identifier
...
Mixed case identifier fix to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
ee0861ae7a
arch: arm: fixes for nxstyle errors
...
Nxstyle error fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
c39339a7a8
arch: arm: include: nxstyle fixes
...
nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
4daa276903
arch: arm: include: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
35e0d13d18
arch: Author Sebastien Lorquet: update licenses to Apache
...
Sebastien Lorquet has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
85bcf1bd4c
arch: Author Alan Carvalho de Assis: update licenses to Apache
...
Alan Carvalho de Assis has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
37f91b023c
arch: Author David Sidrane: update licenses to Apache
...
David Sidrane has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
8dd660ecd4
nuttx: Author David S. Alessio: update licenses to Apache
...
David S. Alessio has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
mage1
6ff11d8c76
mm: add heap policy and anta logic to support mm debug on sim platform
...
since atan tool will enhance memory debug operation.
Change-Id: Ic953755faff156832e84b6a764452751dc14f0e3
2021-03-22 11:02:20 -07:00
Xiang Xiao
e14c458747
mm/heap: Move semaphore related declaration to private header
...
since other subsystem doesn't need call these function anymore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idfb217c412db62d9f17f427310b75bb78785dc50
2021-03-22 15:35:32 +01:00
hotislandn
fdaf265ed0
arch:rv64:c906:colorize the idle stack area;minor fixes.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-22 06:06:24 -07:00
Nathan Hartman
4653dc14d3
Fix typos (and nxstyle errors)
...
ReleaseNotes,
arch/arm/src/cxd56xx/cxd56_dmac_common.h,
arch/arm/src/efm32/efm32_dma.h,
arch/arm/src/lpc54xx/lpc54_lcd.c,
arch/arm/src/rp2040/rp2040_dmac.h,
arch/arm/src/stm32/stm32_dma.h,
arch/arm/src/stm32f0l0g0/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32h7/stm32_dma.h,
arch/arm/src/stm32l4/stm32l4_dma.h,
arch/renesas/src/rx65n/rx65n_dtc.h,
fs/spiffs/src/spiffs_vfs.c,
net/route/cacheroute.h,
net/route/net_cacheroute.c,
net/route/net_foreach_fileroute.c,
net/route/net_foreach_ramroute.c,
net/route/net_foreach_romroute.c, and
net/route/route.h:
* Fix the following typos:
- remove spurious "are"
- "tot he" -> "to the"
arch/arm/src/stm32f0l0g0/stm32_dma.h and
arch/arm/src/stm32l4/stm32l4_dma.h:
* Fix nxstyle errors.
2021-03-21 21:51:14 +01:00
Gustavo Henrique Nihei
e4efa9dfa7
xtensa/esp32: Fix interrupt flag configuration for DMA transfers
...
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
20d24fe148
xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled
...
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
27e2da33b4
xtensa/esp32: Fix buffer size word-alignment for DMA transfers
2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
bfc551484a
xtensa/esp32: Clean up esp32_dma_init code
...
Removed "isrx" parameter whose only purpose is to trigger an assertion
on DEBUG builds. Also performed a minor refactor.
2021-03-20 19:23:44 -07:00
Abdelatif Guettouche
51283bd99a
arch/risc-v/syscall.h: Fix syscall function names in comments.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-20 13:02:54 -03:00
Abdelatif Guettouche
fb0fd36a5c
arch/risc-v: Internal functions should be prefixed by "riscv_" instead
...
of "up_"
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-20 13:02:54 -03:00
Gustavo Henrique Nihei
dc7a0b0a5c
xtensa/esp32: Use Polling instead of DMA for transfers below threshold
...
Also refactored code to remove a confusing duplicate "dma_chan" field
which had the same purpose of the "use_dma" boolean.
2021-03-19 23:13:32 -07:00
Michael Jung
d397e90b9d
stm32l5: Enable SPI support and license clearing
...
Since the original stm32l4 version of this code already has an ASF
license header do that for stm32l5, too.
Apply latest changes to stm32l4_spi.c to stm32l5_spi.c as well.
Update stm32l5/Kconfig to allow selection of SPI1/2/3.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-19 23:02:37 -07:00
Nathan Hartman
4de28efbcb
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/hardware/stm32_bdma.h:
* Fix nxstyle errors.
2021-03-19 22:48:35 -07:00
hotislandn
e452b667ef
arch:rv64:fix 64bit data type and insn for FPU handlers.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-18 22:53:03 -07:00
Michael Jung
a1d0360e5e
stm32l5_lse: Drive reduction after start-up
...
The LSE crystal oscillator driving strength can only be decreased to the
lower drive capability (LSEDRV = 00b) once the LSE is running, but not
to any other drive capability. Instead of letting the user select a
value between 0 and 3 and then failing the build if the selected value
was not 0, make it a boolean option.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
a0ca686490
stm32l5: Rename up_waste to stm32l5_waste
...
To comply to NuttX naming conventions.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
2dbfa54150
stm32l5: Optional LSE xtal drive strength ramp-up
...
Ported from stm32f7/h7: If configured this way, ramp-up the LSE crystal
oscillator driving strength until the LSE starts up.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Nathan Hartman
cbb8a542e5
arch/stm32f0l0g0: Fix nxstyle errors
...
arch/arm/include/stm32f0l0g0/chip.h:
arch/arm/include/stm32f0l0g0/irq.h:
arch/arm/include/stm32f0l0g0/stm32f0_irq.h:
arch/arm/include/stm32f0l0g0/stm32g0_irq.h:
* Fix nxstyle errors.
2021-03-18 22:55:51 +01:00
hotislandn
f16a0a7380
arch:rv64:keep the stack to be 16bytes aligned.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-17 19:50:35 -07:00
Abdelatif Guettouche
27d5c9340a
esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in
...
QEMU, the image is different.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-18 11:28:36 +09:00
Nathan Hartman
5b813f0c14
arch/stm32l4: Fix nxstyle errors
...
arch/arm/include/stm32l4/stm32l4x3xx_irq.h:
arch/arm/include/stm32l4/stm32l4xrxx_irq.h:
* Fix nxstyle errors.
2021-03-17 21:49:30 +01:00
Xiang Xiao
335ba21657
arch/arm: Fix syscall number out of swi range in thumb mode
...
The immediate number is 8bits in thumb mode:
+---------------------+---------------+
|15 14 13 12 11 10 9 8|7 6 5 4 3 2 1 0|
+---------------------+---------------+
| 1 1 0 1 1 1 1 1| imm8 |
+---------------------+---------------+
The immediate number is 24bits in arm mode:
+-----------+-------------------------------------------------------------------------+
|31 30 29 28|27 26 25 24|23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0|
+-----------+-----------+-------------------------------------------------------------+
| cond | 1 1 1 1| imm24 |
+-----------+-----------+-------------------------------------------------------------+
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62503cdc377fcee81864e88e981d389bce2e1b45
2021-03-17 14:52:58 -03:00
Jiuzhu Dong
e96c8b9283
fs: allocate file/socket dynamically
...
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-17 06:46:42 -07:00
SPRESENSE
2f29521dd1
cxd56_cpu1signal: Fix an issue that gnss does not work
...
Because a thread of gnss receiver is created by pthread in the
AppBringUp task, the thread would be killed when AppBringUp
task exits.
Change to use kthread_create instead of pthread_create to prevent
this issue.
2021-03-17 06:36:33 -07:00
SPRESENSE
f7047d8ea3
cxd56_gnss: Add missing include header for cxd56_gnss.c
...
cxd56_gnss.c uses file descriptor operation from next change.
0536953 Kernel module should prefer functions with nx/kmm prefix
But this change need to add fcntl.h in include header.
So, add missing header.
2021-03-17 03:11:54 -07:00
YAMAMOTO Takashi
9bd10898d2
arch/arm/src/lc823450: Make LC823450_IPL2 select BCH
2021-03-17 01:25:16 -07:00
Peter van der Perk
4dd457854d
[FlexCAN] Correct reset state for CTRL1 register
2021-03-16 19:50:58 -07:00
Nathan Hartman
f165270a80
arch/stm32l4: Fix nxstyle errors
...
arch/arm/include/stm32l4/chip.h:
arch/arm/include/stm32l4/irq.h:
arch/arm/include/stm32l4/stm32l4x5xx_irq.h:
arch/arm/include/stm32l4/stm32l4x6xx_irq.h:
* Fix nxstyle errors.
2021-03-16 19:38:30 -07:00
Michael Jung
b3ab373f3a
stm32l5: Fix findings with latest nxstyle
...
Fix some incorrect relative file paths in ASF headers found with the
latest version of nxstyle.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
fb14125320
stm32l5: Coding style fixes
...
Put blanks around the '+' in register address definitions.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
3581289661
stm32l5: Put a timeout on waiting for LSE
...
Do not run into an infinite loop if the LSE does not start up.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00