nuttx/boards/arm64/qemu/qemu-armv8a/src/qemu_bringup.c: In function 'register_pci_host_from_fdt':
nuttx/boards/arm64/qemu/qemu-armv8a/src/qemu_bringup.c:138:15: error: too few arguments to function 'fdt_get_reg_base'
138 | cfg.start = fdt_get_reg_base(fdt, offset);
| ^~~~~~~~~~~~~~~~
In file included from nuttx/boards/arm64/qemu/qemu-armv8a/src/qemu_bringup.c:34:
nuttx/include/nuttx/fdt.h:253:11: note: declared here
253 | uintptr_t fdt_get_reg_base(FAR const void *fdt, int offset, int index);
| ^~~~~~~~~~~~~~~~
Signed-off-by: chao an <anchao.archer@bytedance.com>
The message RAM does not behave correctly if lower 16 bits of
buffer address overflow (upper 16 bits are set once in matrix driver
for the entire CAN driver). For example message RAM starting at
0x2040fc20 would not work for buffers that go beyond 0x20410000 and
MCAN would sent data located at 0x20400000 to the network. The same
issue would occur even if TX buffers would start directly at 0x20410000.
The upper 16 bits would still have 0x2040 value because of RX buffers
located in 0x2040ffff range.
This commit ensures the RAM is always located at the beginning of
the data section and thus the overflow mentioned above should never occur.
The alternative would be to use larger alignment, but the message RAM
can have up to 4352 words and this would cause a significant padding.
The RAM is also initialized to zero to ensure valid parity/ECC checksums.
The address issue is not described anywhere in the manual, so it is
possible this is caused by some incorrect configuration, but the context
of the registers looks valid.
This commit also fixes the compilation errors when the driver is run
without data cache.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
GDB release 16.2 recently to fix the incompatibility issue with LLDB.
For us, the only change is stub must report it support feature 'binary-upload' before GDB will use this feature.
For more information, find bug report and discussion in https://sourceware.org/bugzilla/show_bug.cgi?id=32593
Use GDB 16.2, now it works with binary upload.
```
[remote] Sending packet: $x39c,4#a7
[remote] Received Ack
[remote] Packet received: b\000\203
```
Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
Add documentation for nucleo-h563zi development board.
Removed whitespace at the end of lines.
Fixed column formatting.
Fixed Title overline too short error.
Added image to nucleo-h563zi documentation.
The CPCSTOP has a negative effect on the periodic timer operation.
This causes the timer to stop when an overrun occurs.
Timer must be then restarted in the interrupt. However, as interrupts
are not infinitely fast, this prolongs the next timeout.
Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
This adds semihosting based poweroff to arm/common. It uses
semihosting operation SYS_EXIT (0x18) with parameter AppExit
(0x20026).
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
1. Changes the phyadd to 0xC to speed up the training of phyadd.
2. Set RX DMA buffer size configureable.
3. Create netnsh configs as ethernet boot from QSPI FLASH.
4. Fix some typo in #15720 which is nonsynchronous with local code.
PIC(Position-Independent-Code) board could work on cmake:
cmake -B ap -DBOARD_CONFIG=mps3-an547:ap -GNinja
Signed-off-by: chao an <anchao.archer@bytedance.com>
fix build break:
ld: drivers/libdrivers.a(rptun_ivshmem.c.obj): in function `rptun_ivshmem_get_resource':
nuttx/drivers/rptun/rptun_ivshmem.c:215:(.text.rptun_ivshmem_get_resource+0xfc): undefined reference to `simple_addrenv_initialize'
ld: openamp/libmetal/lib/libmetal.a(io.c.obj): in function `metal_io_phys_to_offset_':
nuttx/openamp/libmetal/lib/system/nuttx/io.c:112:(.text.metal_io_phys_to_offset_+0xc): undefined reference to `up_addrenv_pa_to_va'
Signed-off-by: chao an <anchao.archer@bytedance.com>
An example implementation for OpenAMP based on the Inter-VM share memory(ivshmem)::
rpproxy_ivshmem: Remote slave(client) proxy process.
rpserver_ivshmem: Remote master(host) server process.
Signed-off-by: chao an <anchao.archer@bytedance.com>
rpproxy_ivshmem: Remote slave(client) proxy process.
rpserver_ivshmem: Remote master(host) server process.
Please refer to the official Qemu ivshmem documentation for more information:
https://www.qemu.org/docs/master/system/devices/ivshmem.html
Signed-off-by: chao an <anchao.archer@bytedance.com>
The `$(APPDIR)` folder is added to the `$(KERNDEPDIRS)` when
`CONFIG_BUILD_KERNEL=y`. The `depend` phase iterates over the
`$(KERNDEPDIRS)` folders and executes the `depend` recipe of these
folders (including the apps' recipes) with the `__KERNEL__` macro
defined, which prevents `system()`'s prototype from being declared.
If the nodesize is 0, we cannot iterate to next node, siliently return None will cause memleak command to generate false positive report with no warnings.
Add log to indicate such case.
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
According to https://pubs.opengroup.org/onlinepubs/9799919799/, the
expected behavior for the wcstombs() function is that it should
convert the wide-character codes stoping conversion either when a
character sequence exceeds the limit of n total bytes or if a null
byte is stored. In the first case, the null-terminated value should
not be appended to the dst buffer.
Currently, no null-terminator is appended to the dst buffer, even
when it's expected to be appended, generating erroneous output.
The missing <nuttx/spinlock.h> header caused following compile errors:
CC: clock/clock_adjtime.c clock/clock_adjtime.c: In function 'adjtime_wdog_callback':
clock/clock_adjtime.c:67:11: error: implicit declaration of function 'spin_lock_irqsave' [-Wimplicit-function-declaration]
67 | flags = spin_lock_irqsave(&g_adjtime_lock);
| ^~~~~~~~~~~~~~~~~
clock/clock_adjtime.c:78:3: error: implicit declaration of function 'spin_unlock_irqrestore' [-Wimplicit-function-declaration]
78 | spin_unlock_irqrestore(&g_adjtime_lock, flags);
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Reduce leak analysis time from 12s to 7.8s, achieving a 35% performance improvement that tested on an internal project.
1. Use memoryview to avoid creating int objects, reducing overhead
2. Store checked pointers in a dictionary for efficient lookups, improving performance.
3. While dictionary operations have some cost, the overall speedup is significant.
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
Make sure the registers context size is aligned to 16bytes as required by armv8-a.
This issue has been reported earlier, thus make sense to make sure it won't happen in future.
Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
zynq-mpsoc and zcu111 borad was broken by #15437, because #15437 changes
ARM64_CONTEXT_REGS from 36 to 37, resulting in the stack no longer being
16-byte aligned which appears to violate the ARMv8-A architecture's
requirement for 16-byte stack alignment. this commit changes ARM64_CONTEXT_REGS
to 38 to fix this issues.
The PS-side Gigabit Ethernet MAC (GEM) implements a 10/100/1000 Mb/s
Ethernet interface, which connects to a TI DP83867IRPAP Ethernet
RGMII PHY before being routed to an RJ45 Ethernet connector on ZCU111
board.The RGMII Ethernet PHY is boot strapped to PHY address 5'b01100
(0x0C) and Auto Negotiation is set to Enable.This commit add Ethernet
support for ZCU111 board and TI DP83867IRPAP Ethernet RGMII PHY.
Zynq MPSOC The processing system (PS) is equipped with four gigabit
Ethernet controllers.Each controller can be configured independently.
Each controller uses a reduced gigabit media independent interface (RGMII)
v2.0. This commit add support for ethernet of ZYNQ MPSOC.
Summary:
- Added `--print-memory-usage` to `LDFLAGS` in `Toolchain.defs` for both `lx6` and `lx7` architectures
- This flag enables memory usage reporting during the linking phase, providing better visibility into memory allocation
Impact:
- No functional changes - the flag only adds additional debug information during the build process
- Improves debugging and optimization capabilities by providing detailed memory usage statistics
- Maintains compatibility with existing build configurations and toolchains
Testing:
Test result on esp32s3:
```
Memory region Used Size Region Size %age Used
ROM: 556116 B 16777184 B 3.31%
iram0_0_seg: 23296 B 304 KB 7.48%
irom0_0_seg: 621652 B 16777184 B 3.71%
dram0_0_seg: 85780 B 288 KB 29.09%
drom0_0_seg: 157180 B 16777184 B 0.94%
rtc_iram_seg: 0 B 8168 B 0.00%
rtc_data_seg: 0 B 8168 B 0.00%
rtc_reserved_seg: 0 B 24 B 0.00%
rtc_slow_seg: 0 B 8 KB 0.00%
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
What's really need is a done signal sent from the secondary
cpu to the boot cpu, so let's simplify the logic by:
1.Change the spinlock to a bool flag
2.Set the flag to true in the secondary cpu
3.Wait the flag set in the boot cpu before continue booting
This also remove all bad usage of spinlock from the code base:
1.Lock spinlock in one thread, but unlock in a different thread
2.Lock spinlock twice in one thread, but unlock only once
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
