Commit graph

39 commits

Author SHA1 Message Date
lipengfei28
4dec7c2766 drivers/pci:x86_64 calculate bar size
X86_64:nit bar in bios, so in nuttx, the bar is setuped
kvm_set_user_memory_region: KVM_SET_USER_MEMORY_REGION failed

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2026-01-15 02:19:57 +08:00
Lars Kruse
3ce85ca54e style: fix spelling in code comments and strings 2025-05-23 10:48:41 +08:00
chao an
60636c4666 drivers/pci: fix typo addres -> address
fix typo addres -> address

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-17 20:48:07 +08:00
lipengfei28
aa1df4e9a9 pci: fix pci dev alloc bridge mem error
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-12-06 21:12:24 +08:00
lipengfei28
f589d5a4c7 pci: pci res have pci addr and cpu addr, ecam use map translation pci
addr to cpuaddr

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-11-29 11:12:54 +08:00
lipengfei28
b44fb53b61 pci:map bar should not be zaro len
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-11-29 11:12:54 +08:00
Alin Jerpelea
286d37026c drivers: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-11-06 18:02:25 +08:00
lipengfei28
e259aba31c fix build error shift-count-overflow
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-18 17:23:41 +08:00
yezhonghui
72e7935431 Fix disable msi when msi capability not exist issue
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-10-16 17:12:34 +08:00
Bowen Wang
143466baed drivers/pci: fix pci framework warning in 32bit chip
In file included from pci/pci.c:30:
pci/pci.c: In function 'pci_setup_device':
pci/pci.c:449:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  449 |           pci_write_config_dword(dev, base_address_1, res->start >> 32);
      |                                                                  ^~
pci/pci.c: In function 'pci_presetup_bridge':
pci/pci.c:541:51: warning: right shift count >= width of type [-Wshift-count-overflow]
  541 |                              ctrl->mem_pref.start >> 32);
      |                                                   ^~
pci/pci.c: In function 'pci_postsetup_bridge':
pci/pci.c:604:57: warning: right shift count >= width of type [-Wshift-count-overflow]
  604 |                              (ctrl->mem_pref.start - 1) >> 32);
      |                                                         ^~
CC:  pthread/pthread_release.c pci/pci_ecam.c:71:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int *)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int *)'} [-Wincompatible-pointer-types]
   71 |   .read  = pci_ecam_read_config,
      |            ^~~~~~~~~~~~~~~~~~~~
pci/pci_ecam.c:71:12: note: (near initialization for 'g_pci_ecam_ops.read')
pci/pci_ecam.c:72:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int)'} [-Wincompatible-pointer-types]
   72 |   .write = pci_ecam_write_config,

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-13 02:28:32 +08:00
lipengfei28
4ebf830bbd userspace: Exclude nuttx/arch.h
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-09 13:52:01 +08:00
yezhonghui
c90b654598 release msi/msix irq clean capability struct
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-10-08 23:47:45 +08:00
yezhonghui
85591fc360 pci alloc mis irq support new interface
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-30 15:41:28 +08:00
Bowen Wang
e706805c8b drivers/pci: one pci device should only associate with one driver
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
d6f4d0a20a drivers/pci: change all devfn type to unsigned int
Now all the type of devfn in pci framework are unsigned int

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
Yongrong Wang
2756045b07 pci.c: fix compile warning
pci/pci.c:1128:15: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~
      |                                               |
      |                                               uint32_t {aka long unsigned int}
pci/pci.c:1128:30: note: format string is defined here
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |                             ~^
      |                              |
      |                              unsigned int
      |                             %lx

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-09-27 17:12:09 +08:00
wangyongrong
e4be747cf5 pci.c: fix pci 32bit warning
pci/pci.c:863:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  863 |       pci_write_config_dword(dev, msi + PCI_MSI_ADDRESS_HI, (mar >> 32));

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
0f3feefa85 drivers/pci/pci.c: fix warning when CONFIG_PCI_ASSIGN_ALL_BUSES=n
pci/pci.c:415:34: warning: variable ‘res’ set but not used [-Wunused-but-set-variable]
  415 |       FAR struct pci_resource_s *res;
      |                                  ^~~
pci/pci.c: In function ‘pci_scan_bus’:
pci/pci.c:663:32: warning: unused variable ‘ctrl’ [-Wunused-variable]
  663 |   FAR struct pci_controller_s *ctrl = bus->ctrl;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
fd182dad64 drivers/pci: add error handle for pci_alloc_bus/device()
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 14:12:11 +08:00
wangyongrong
e8f6b1e695 pci.c: fix judge err in pci_connect_irq
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-27 14:12:11 +08:00
wangyongrong
6cec175c9d pci.c:fix ops not implement after calling panic err
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-27 14:12:11 +08:00
lipengfei28
56f57e5f9b add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 00:10:19 +08:00
lipengfei28
1eb151bef6 add pci_bus_map_region and pci_map_region macro
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-26 16:23:18 +08:00
wangyongrong
3b09de844f pci.h: add pci_map_bar_region support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-26 16:23:18 +08:00
p-szafonimateusz
51909ed59f drivers: fix gcc14 errors for PCI
fix gcc14 errors for PCI

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
Xiang Xiao
1d586c3bee pci: Add driver_data to pci_device_id_s
so driver writer could save the private data here
and get it back in the probe function.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
db6d0bd356 drivers/pci: add MSI/MSI-X support
Add support for MSI and MSI-X in PCI framework

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
Bowen Wang
4fe2a0daf8 pci/pci.c: fix some pci BUGs
fix some pci BUGs that make it impossible to match PCI device

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-12 18:10:46 +08:00
lipengfei28
aeb98d9c05 fix Compile error
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
b70922cb24 pci: add ioctl for userspace
which is same as OpenBSD:
https://github.com/openbsd/src/blob/master/sys/sys/pciio.h

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
dba7700813 pci: add rom addr and rom size to resource
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
3250625a15 pci: add find device from bus
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
c25f839b06 pci: add pci bus find capability interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
45f1597562 pci: add pci read/write config/io space interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
d9c8838319 pci: use g_pci_ctrl_list replace g_root_bus_list
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
7cbb7d36d8 Changed the x86 64 pci driver
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
125884ae95 Changed the pci bus for arm architecture
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
raiden00pl
a12fdd8876 cosmetic changes after pci code rebase 2024-01-25 09:09:30 -08:00
Brennan Ashton
69ed5bb67d Various fixes for PCI work
Squashed commits:

1. Porting prior PCI work in place of jailhouse code

At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.

Running QEMU with this configuration we see the bridge and the
device on the bridge.  It also detected the qemu test device

qemu-system-x86_64 \
  -cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
  --enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
  -device pci-testdev \
  -device pci-bridge,id=bridge0,chassis_nr=2 \
  -device e1000,bus=bridge0,addr=0x3

qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000

2. Remove unused CONFIG_PCI_MAX_BDF option

3. Add a workaround for Jailhouse pci scanning

4. Extend BAR parsing and handle PIO and MMIO for pci-testdev

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

5. PCI: Add initial support for QEMU 'edu' test device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

6. Bring up PCI later in boot process

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

7. Add ISR and DMA support to QEMU edu test pci device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

8. Fix bad function prototype definition in qemu_edu

9. intel64:  Add a pci test configuration and instructions

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

10. PCI: Fix issue in identification of 64bit bar

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2024-01-25 09:09:30 -08:00