Commit graph

19 commits

Author SHA1 Message Date
Eren Terzioglu
1dcbb7c519 boards/xtensa/esp32[-s2|-s3]: Refactor PM board layer
Refactor PM board layer for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-12-02 02:37:06 +08:00
Filipe Cavalcanti
680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Filipe Cavalcanti
58cdb9cfea boards/xtensa: optimize linker script IRAM section
Improve IRAM usage.
- Remove unnecessary E-Fuse sources;
- Optimizing (ESP32) and add (S2|S3) libpp(Wi-Fi related).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Filipe Cavalcanti
1d51cfbda7 arch/xtensa: add sys_startup_fn call
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
187a386cc7 arch/xtensa: update lower-half drivers for ESP32|S2|S3 2025-06-30 22:40:26 +08:00
Filipe Cavalcanti
28abfb5fd1 boards/esp32s3: fix rtc segment on linker script
Modify rtc_data_seg to rtc_slow_seg to fix RTC problems.
The proper location for those is in RTC slow memory.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-05-05 23:50:52 +08:00
Tiago Medicci Serrano
4a8af202c6 boards/xtensa/esp32[|s2|s3]: Fix unknown disassembling instructions
This commit adds sections used by the debugger and disassembler to
get more information about raw data present in the code.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-24 10:05:37 -03:00
Tiago Medicci Serrano
216c4b00e2 boards/[risc-v|xtensa]/esp32[|c3|c6|h2|s3]: set coexiram sections
This commit sets the coexiram (from libcoexist.a) sections on IRAM.

Before this commit, no other rules matched such sections and the
sections could be placed outside markers that denote the end of the
text sections, causing unexpected errors.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-23 16:17:17 +08:00
Tiago Medicci Serrano
2bbafcacc1 xtensa/esp32s3: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Tiago Medicci Serrano
622355b5c3 arch/xtensa/esp32s3: Fix bug regarding SPI flash operation mode
SPI flash operation modes - Dual Output (dout), Dual I/O (dio),
Quad Output (qout), Quad I/O (qio) and Octal (opi) were not being
properly selected. This commit fixes this behavior and the device
is now able to boot and initialize the proper SPI flash mode.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-08 14:44:38 +08:00
Tiago Medicci Serrano
1e8250d918 boards/xtensa/esp32s3: Move some .bss sections to the external RAM
This commit moves some internal libraries' .bss sections to the
external PSRAM chip, freeing internal memory for other usages. Note
that it is necessary to update `esp32s3-devkit:python` defconfig
otherwise it would fail to build.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-05 11:24:58 +08:00
Tiago Medicci Serrano
97aa90570c xtensa/esp32s3: allow moving .bss data to the external PSRAM
This commit allows placing .bss data into the external PSRAM.
Previously, the PSRAM was fully allocated to the heap memory only
and now part of it can be used to allocate .bss data freeing the
internal memory.
2025-02-19 11:44:18 -03:00
Filipe Cavalcanti
954081cdd8 xtensa/esp32s3: use common Espressif wireless source
Update the wireless symbols from ESP32S3_* to ESPRESSIF_* for using common layer.
Remove ESP32S3 specific WiFi files and edit build system to use common layer.
2025-02-17 12:03:57 +01:00
hujun5
8f9c1cbe73 xtensa/esp32s3: Fix esp32s3 sched_lock crash
move the code to iram0 since sched_lock/sched_unlock
is called in the early boot phase

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2025-01-31 23:19:59 +08:00
Tiago Medicci Serrano
7548db1980 arch/xtensa: Support __thread and thread_local keywords
Enable architecture-specific support for those keywords. This is a
"gcc-based" thread local storage implementation.
2024-12-21 20:49:07 +08:00
Alin Jerpelea
4ef01d98d5 boards/xtensa/esp32s3: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-11-12 22:20:59 +08:00
Tiago Medicci Serrano
d1fd1ed8f6 boards/esp32s3: Merge MCUboot and "simple-boot" linker scripts
To make it easier to keep the linker scripts updated for both
MCUboot and "simple-boot", this commit merges them into a single
linker script with macros to enable/disable specific sections.
2024-10-23 22:26:39 +08:00
Almir Okato
8f3c425067 xtensa/esp32s3: Enable booting from MCUboot bootloader
Add support for booting from MCUboot bootloader on ESP32-S3.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2022-12-15 00:42:13 +08:00
Gustavo Henrique Nihei
1befe6076f xtensa/esp32s3: Move linker scripts to folder common to all boards
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-11-02 16:04:00 +01:00
Renamed from boards/xtensa/esp32s3/esp32s3-eye/scripts/esp32s3.ld (Browse further)