Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Adds support for init script on ESP32 and ESP32-S2.
Moves the scripts of ESP32-S3 from board specific to
board common (they are the same).
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
NVBLK provides a block device that operates on top of a non volatile
memory (as a mtd device) that enables wear levelling for non volatile
memory. It's operation is similar to the dhara wear levelling library,
but nvblk is meant to be used on smaller (nor, mram, rram) memory.
I am also the author and maintainer of the nvblk library.
A block device can be created during startup by using:
```
nvblk_initialize(0, mtd, CONFIG_MTD_NVBLK_DEFAULT_LBS,
CONFIG_MTD_NVBLK_DEFAULT_IOBS,
CONFIG_MTD_NVBLK_DEFAULT_SPEB);
```
and a fat filesystem on top of this as:
```
nsh> mkfatfs /dev/mtdblock0
nsh> mount -t vfat /dev/mtdblock0 /mnt
```
this fat filesystem can then be used:
```
nsh> echo "test" > /mnt/test.txt
nsh> cat test.txt
test
nsh>
```
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Adds a defconfig for SDMMC over SPI to the following boards:
esp32-devkitc, esp32s2-saola-1 and esp32s3-devkit.
Renames the defconfig name for:
esp32-lyrat and esp32-wrover-kit.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This enables the use of the cryptographic accelerator within
the ESP32. The support algorithms are: SHA1, SHA256, SHA384
and SHA512.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Adds adc defconfig and board support for: esp32-devkitc, esp32s2-saola-1 and esp32s3-devkit.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
test:
1.use mps3-an547 build helloxx as module and run it
2.use qemu-armv7a:knsh test kernel build helloxx and run it
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
Modify addressing to allow only 2 byte node address.
Allow modifying the node address by modifying the ipv6 address
(the ipv6 address has a direct relation with the node address)
Introduce the option to add a 4 byte random number to the mac header
as a preparation for ciphered data exchange.
Introduce a FCB (frame control byte) as a replacement for the INFO
field in the mac header.
Update esp32-devkitc:espnow config to reflect address size change.
Update the documentation to reflect address size changes.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Update the wireless symbols from ESP32_* to ESPRESSIF_* for using common layer.
Remove ESP32 specific WiFi files and edit build system to use common layer.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Added documentation for espnow and a default defconfig to illustrate
the use of espnow for udp communication.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Under apps/testing folder, the macro of CONFIG_TESTING_MM is changed to CONFIG_TESTING_HEAP.
So we need to update the defconfig containing CONFIG_TESTING_HEAP in the nuttx/boards folder.
Signed-off-by: tengshuangshuang <tengshuangshuang@xiaomi.com>
arch/xtensa: add support for capture driver on ESP32 and ESP32|S3|
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Review fixes
arch/xtensa: add support for fault signal on motor control
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Got responsive fault indicator
Working brakes - still need to work on starting isr
Fixed single-time ISR initializiation
Working soft brake on fault
Improved KConfig for BDC and BLDC
Kconfig fixed at board level
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
1. Adjust code to avoid PM wakelock->count less than or equal to 0.
2. Fix some document format issues.
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
This commit implements the common RMT driver (already available for
the other Espressif's xtensa-based devices) for ESP32.
This allows us to have a proper separation between the lower and
upper-half drivers and use the 'ws2812' example to drive WS2812 RGB
LEDs.
This commit updates the Wi-Fi and the BLE driver of ESP32. Most of
the changes rely on using the common sources and header files for
xtensa-based Espressif's SoCs.
The new Wi-Fi driver supports WPA3-SAE for both Station and SoftAP
mode. BLE's coexistence mode was enhanced according to the latest
libraries.
Please note that other sources required minor changes in order to
be compatible with the common sources.
