Commit graph

22 commits

Author SHA1 Message Date
Eren Terzioglu
8902e511d3 boards/risc-v/esp32[-c3|-c6|-h2]: Add deep sleep board support
Add deep sleep board support for risc-v based Espressif chips

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-11-29 14:35:34 +08:00
Eren Terzioglu
d4c76b1f60 arch/risc-v/esp32[-c3|-c6|-h2]: Add deep sleep support
Add deep sleep support for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-11-29 14:35:34 +08:00
Filipe Cavalcanti
4ccae59e69 arch/risc-v: update SPI Flash driver for ESP32-C3|C6|H2
Updates the SPI Flash driver used for user storage MTD.
Updates board linker script and bring up.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Filipe Cavalcanti
e57d2a5247 arch/risc-v: update lower-half drivers for ESP32-C3|C6|H2 2025-06-30 22:40:26 +08:00
Leo Chung
61f205f1d4 risc-v/esp32h2:Add missing bootloader flash_qio_mode file in link
script

Add missing flash_qio_mode file in bootloader link script, it will be
used when CONFIG_ESPRESSIF_FLASH_MODE_QIO option is enabled.

Signed-off-by: Leo Chung <gewalalb@gmail.com>
2025-04-29 09:20:15 -03:00
Tiago Medicci Serrano
216c4b00e2 boards/[risc-v|xtensa]/esp32[|c3|c6|h2|s3]: set coexiram sections
This commit sets the coexiram (from libcoexist.a) sections on IRAM.

Before this commit, no other rules matched such sections and the
sections could be placed outside markers that denote the end of the
text sections, causing unexpected errors.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-23 16:17:17 +08:00
Tiago Medicci Serrano
956915ff97 risc-v/esp32h2: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Tiago Medicci Serrano
08fe636001 xtensa/esp32[s2|c3|c6|h2]: fix sched_[lock|unlock] boot crash
Move the code to iram0 since sched_lock/sched_unlock is called in
the early boot phase.
2025-02-02 00:51:42 +08:00
Eren Terzioglu
35ace4196f esp32[c3|c6|h2]: Add efuse simulation support 2024-12-17 01:04:39 +08:00
Alin Jerpelea
dccd41bad7 boards/risk-v/esp32h2: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-11-12 22:20:59 +08:00
Filipe Cavalcanti
a876f00e2a risc-v/espressif: support marking interrupt as running from IRAM 2024-09-30 20:42:00 +02:00
Tiago Medicci Serrano
a916de0e14 espressif: Update HAL library reference to include debug assert
During the board bringup, the new HAL reference includes an assert
to check if the critical section flags is being stored as expected.
2024-08-30 21:41:47 +08:00
Tiago Medicci Serrano
a763ed1e07 espressif: Fix build with RTC
This commit ensures that RTC data is properly allocated in the RTC
segment in the linker. This fixes the reported problem about using
the legacy bootloader and RTC.
2024-08-29 09:05:17 +08:00
Tiago Medicci Serrano
568917bfd2 espressif: Fix MCUboot build on RISC-V and unify linker script
This commit fixes building MCUboot on Espressif's RISC-V SoCs and
unify the associated linker scripts to make improve readability.
2024-08-21 23:28:45 +08:00
Tiago Medicci Serrano
5680e9d5a4 espressif: Update internal libraries reference
Update internal reference to get the most updated Espressif's
libraries. Those libraries are based on branch `release/v5.1` of
the ESP-IDF and include `v5.1.4` version of it.
2024-08-21 23:28:45 +08:00
Eren Terzioglu
c15c0d1a78 esp32[h2]: Add MCUBoot support 2024-07-14 11:38:29 +08:00
Inochi Amaoto
f4a38c01df arch/risc-v: Make esp32 SoCs allocate idle stack after ebss
ESP32 SoC use a static allocated array as idle stack. To fit
the existed idle stack allocation, make idle stack allocated
from ebss for the whole esp32 series.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-05-08 15:43:41 +08:00
Eren Terzioglu
c0d7419d11 esp32[c3|h2|c6]: Bugfixes for filesystem errors 2024-04-09 10:48:40 +08:00
Tiago Medicci Serrano
65bd548521 esp32[c3|c6|h2]: Fix RTC data placement
RTC data was not being correctly placed on RTC's memory data due to
linker issues. Also, the image's RTC memory segment was not being
properly parsed by the bootloader.
2024-04-05 02:50:19 +08:00
Eren Terzioglu
11efa29192 esp32h2/scripts: Add simpleboot support for esp32h2 2024-03-09 11:53:47 +08:00
Eren Terzioglu
aa0dccb7bc risc-v/espressif: Add SPI Flash support 2024-02-21 07:19:51 -08:00
Eren Terzioglu
d1db1810ad risc-v/espressif: Rename espressif/esp32c3 as esp32c3
risc-v/espressif: Rename espressif/esp32c6 as esp32c6
risc-v/espressif: Rename espressif/esp32h2 as esp32h2
2024-01-30 08:32:05 +01:00