Alin Jerpelea
3dde10adaa
arch/risk-v: migrate to SPDX identifier
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Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-02 17:23:25 +08:00
Eero Nurkkala
b9ba262fb7
risc-v/mpfs: add athena irq defines
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Add the Athena cryptographic microprocessor irq defines.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-02-15 00:21:03 +08:00
Nathan Hartman
20bdd44e7b
Remove executable permission from source and build files.
2022-08-04 12:48:18 -03:00
Xiang Xiao
c20ed58879
arch: Remove the inclusion of arch/irq.h from chip/irq.h
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since arch/irq.h will include chip/irq.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:03:47 +03:00
Huang Qi
d846bb0235
arch/risc-v: Remove dupped irq code from mpfs
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-21 00:44:43 +08:00
Huang Qi
6dc4dd207f
arch/risc-v: Remove dupped irq code from rv32m1
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-21 00:44:43 +08:00
Dong Heng
60fb1adaca
riscv: Add inline IRQ process functions
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Remove functions from RISC-V chips.
2021-06-15 23:25:16 -05:00
Janne Rosberg
d6205642ab
add support for PolarFire SoC and icicle board
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Co-authored-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-05-24 22:55:44 -05:00
