For AVR, atomic functions generated by LOAD macro turn into load surrounded
by up_irq_save and up_irq_restore. The generated code was incorrect as can
be seen from disassembly of __atomic_load_4:
in r18, 0x3f ; store interrupts enabled flag
cli ; disable interrupts
out 0x3f, r18 ; restore the flag
movw r30, r24 ; copy parameter (address) to pointer register
ld r22, Z ; indirect load to return value registers
ldd r23, Z+1
ldd r24, Z+2
ldd r25, Z+3
ret ; return
The interrupts are disabled to be immediately re-enabled, the load only takes
place after that.
Both up_irq_save and up_irq_restore are defined in inline assembly. Other
architectures (x86/486, Risc-V) mark this assembly with clobbers: memory.
Doing the same thing for AVR alleviates the problem:
in r18, 0x3f ; store interrupts enabled flag
cli ; disable interrupts
movw r30, r24 ; copy address
ld r22, Z ; load
ldd r23, Z+1
ldd r24, Z+2
ldd r25, Z+3
out 0x3f, r18 ; restore interrupts enabled flag
ret ; return
Besides compiling the code and checking the assembly, this was tested
with a custom stress application on AVR128DA28.
Assembly of up_irq_enable is marked in the same way with regards to clobbers.
This patch also removes two functions that are not called from anywhere
(up_irq_disabled, putsreg)
Signed-off-by: Kerogit <kr.git@kerogit.eu>
This patch adds definitions for listed chips. No other changes are needed
as the chips are similar to the previously supported AVR128DA28 and all
that is needed is some definitions for extra peripherals.
Initial support adds chip specific files like Kconfig, flags for the compiler,
and basic functionality like system timer. Some files are stubs derived
from corresponding ATmega files but without the functionality they are
supposed to add (to be done in later patches)
Part of the work is altered copies of corresponding files for ATMega MCUs.
Initially supported is AVR128DA28.
Inline & inline_function both used make confuze, let's modify all inline
in irq.h to inline_function, also clear the always_inline_funcion
declaration.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Some app with same code runs on different cores in AMP mode,
need the physical core on which the function is called.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
I recently imported NuttX version 6.0 (and nsh) into a Microchip
Studio project [1] on Windows to figure out what was going wrong with
the avr32dev1 build. I also briefly checked NuttX version 10.
I worked with the assumption that the avr32 (avr32dev1) specific
changes to the codebase were minimal across NuttX releases.
For the initial proof of concept I used Microchip Studio version 7.0
(with the recent Microchip's ASF updates). I use avr32-gcc (4.4.7)
hosted here [2] for building NuttX for avr32dev1 on GNU/Linux.
Even with the Microchip Studio project, I had initial debug problems
with just stepping through the code a line at a time. I had to bring
in crt0, a trampoline stub and the linker file from one of my older
projects to really build on the suspicion I had with the linker file.
Perhaps an older version of avr32-gcc did something differently. I am
not sure about this. I used avr32-objdump to see the output sections
of the generated elf file. I just had to tweak the linker script to
ensure correct linking of the sections.
With those changes, I was able to inspect the UART sections within
NuttX Microchip Studio project.
Second important change: the transmit pin: I had to reassign the pin
to see the nsh console.
These are the currently assigned UART pins:
RX: PA_24 -> Physical IC pin 59
TX: PB_02 -> Physical IC pin 24
For the avr32dev1 board, they are pins: J1 (berg pin 28) and J2 (berg
pin 10).
In addition, the PR fixes silly compilation problems with avr32dev1.
I have tested the nsh build with my avr32dev1 boards. I used Atmel ICE
to program one of them (flash at 0x80000000) and dfu-programmer to
test my other board (flash at 0x80002000). The other RS-232 parameters
are the same as they were.
References:
[1]: https://github.com/ramangopalan/nuttx_avr32dev1
[2]: https://github.com/ramangopalan/avr32-gnu-toolchain-linux_x86_64
Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG. The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
libs/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
syscall/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
wireless/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
Documentation/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
include/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
drivers/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
sched/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
configs: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/xtensa: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/z80: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/x86: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/renesas and arch/risc-v: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/or1k: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/misoc: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/mips: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/avr: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/arm: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
