Commit graph

16008 commits

Author SHA1 Message Date
guoshichao
ff4ad07576 greenhills: add cmake support
1. refactor the ghs/gcc/clang/armclang toolchain management in CMake
2. unify the cmake toolchain naming style
3. support greenhills build procedure with CMake
4. add protect build for greenhills and gnu toolchain with CMake

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-10-01 11:48:09 +08:00
chenrun1
4b7c36554c mps_allocateheap:Modify the heap logic
Summary:
  Due to the modification of 4244610, the heap_size may be used on SRAM1, which can lead to misconfiguration problems for some mps qemu configurations (e.g.MPS3) that use extern DDR as the heap, refer to the previous issue VELAPLATFO-34555.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
ligd
23ad93f430 mps: update the mps3-an547 mps2-an500 defconfig
Fix compile failed when open BASEPRI
Open same feature on mps3

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
anjiahao
f79ae00a4f mps3-an547:fix sram range error
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
anjiahao
9122c3e44d mps:Supplement the interrupt definition about nvic
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
qinwei1
9f97d9abb0 boards/arm.mps/mps2-an521: add support for mps-521 board
Summary
   MPS-521 support Dual Cortex-M33 and maybe suitable for AMP-like
case which is for AUTO OS, the change
  1. add support for single core at msp-521 with nsh bringup
  2. testing with ostest

TODO:
  Dual core support for flat-build
  Dual CORE support for Protected Build

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
Gao Jiawei
aaf63d1d85 Enable stack check feature on MPS2-AN500 board
Signed-off-by: Gao Jiawei <gaojiawei@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
chenrun1
9f1ad1fc4f mps_an547:Adjust the an547 initialization stack allocation
Summary(for an547):
  1. Add maximum external storage expansion (2GB)
  2. Change PRIMARY_RAM_START to MPS_SRAM2_START (4MB)
  3. When REGIONS > 1, use external expansion as Heap

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
qinwei1
02f1d732a9 arch/arm/src/mps: implement Protected Build for mps2-an500
Summary
 1. add Protected build Support for ARM MPS AN500
 2. refine mps Memory layout configure and enable MPU support
Note
 1. ostest for an547:nsh
 2. ostest for an500:nsh and an500:knsh

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
Gao Jiawei
e763b0cfe6 add cmake building support for mps board
Signed-off-by: Gao Jiawei <gaojiawei@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 20:06:52 +08:00
yezhonghui
85591fc360 pci alloc mis irq support new interface
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-30 15:41:28 +08:00
ligd
c4b969b5ee armv7/8-m/r: fix build warning
Error: armv7-m/arm_mpu.c:211:13: error: function declaration isn't a prototype [-Werror=strict-prototypes]
  211 | static void mpu_reset_internal()
      |             ^~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[1]: *** [Makefile:168: arm_mpu.o] Error 1

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-30 14:09:15 +08:00
hujun5
d4707646d5 arch: We can use an independent SIG interrupt to handle async pause,
which can save processing time.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-29 08:54:51 +08:00
hujun5
9de9f8168d sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-29 08:54:51 +08:00
hujun5
64ebb149c6 syscall: Use a more compatible writing style
compile error:
Register: ostest
Register: nsh
Register: sh
Register: hello
Register: getprime
In file included from /home/hujun5/downloads1/vela_sim/nuttx/include/arch/irq.h:35,
                 from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/irq.h:37,
                 from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/sched.h:40,
                 from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/arch.h:87,
                 from common/arm_signal_dispatch.c:26:
common/arm_signal_dispatch.c: In function 'up_signal_dispatch':
common/arm_signal_dispatch.c:72:3: error: 'asm' operand has impossible constraints
   72 |   sys_call4(SYS_signal_handler, (uintptr_t)sighand, (uintptr_t)signo,
      |   ^~~~~~~~~
make[1]: *** [Makefile:168:arm_signal_dispatch.o] error 1

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-28 19:08:15 +08:00
hujun5
4c69bb8cc7 arch: inline up_switch_context,in arm arm64
reason:
when a context switch occurs, up_switch_context is executed.
In order to reduce the time taken for context switching,
we inline the up_switch_context function.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-28 19:08:15 +08:00
Yongrong Wang
fa6d41471f arm_gicv2.c: fix armv7a compile error
/vela/nuttx/drivers/pci/pci_ecam.c:432:(.text.pci_ecam_get_irq+0x16): undefined reference to `up_get_legacy_irq'

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-09-28 13:34:33 +08:00
lipengfei28
39ec3291ee armv7a pci irq support
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-28 13:34:33 +08:00
hujun5
f49d5f4451 armv7a/r: fix use arch-timer in SMP
reason:
Only one timer will be effective at a time.In the current
implementation of NuttX's timer handling, only a single global timer is necessary.
Having an excessive number of timers can lead to additional performance
overhead and logical errors, especially when operating in SMP
(Symmetric Multi-Processing) tickless mode.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-28 11:52:09 +08:00
Jinliang Li
19230e3a2b arm/armv8-r: fix armv8 build error without neon
Fix the build error:
armv8-r/arm_vectors.S:205:Error: VFP single precision
register expected -- `vstmdb.64 sp!,{d16-d31}'
armv8-r/arm_vectors.S:242:Error: VFP single precision
register expected -- `vldmia.64 r0!,{d16-d31}'

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
2024-09-27 11:23:05 +08:00
ligd
35c8c80a00 arch: change nxsched_suspend/resume_scheduler() called position
for the citimon stats:

thread 0:                     thread 1:
enter_critical (t0)
up_switch_context
note suspend thread0 (t1)

                              thread running
                              IRQ happen, in ISR:
                                post thread0
                                up_switch_context
                                note resume thread0 (t2)
                                ISR continue f1
                                ISR continue f2
                                ...
                                ISR continue fn

leave_critical (t3)

You will see, the thread 0, critical_section time is:
(t1 - t0) + (t3 - t2)

BUT, this result contains f1 f2 .. fn time spent, it is wrong
to tell user thead0 hold the critical lots of time but actually
not belong to it.

Resolve:
change the nxsched_suspend/resume_scheduler to real hanppends

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-27 09:53:33 +08:00
guoshichao
dbe09c1505 greenhills: add -Osize build option to reduce the size
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-27 00:17:58 +08:00
guoshichao
8c651d3d05 greenhills: add support for cortex-m4 platform
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-27 00:17:58 +08:00
ligd
551e6ce3ab compile: add DEBUG_SYMBOLS_LEVEL allow custom the level
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-27 00:13:07 +08:00
anjiahao
c76e83beaa Debug option:change -g to -g3, add macro information to elf
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-09-27 00:13:07 +08:00
guoshichao
74d627f5f0 greenhills: fix the arm_signal_handler.S build error
[asarm] (error #2067) /home/guoshichao/work_profile/vela_os/vela_car_6/nuttx/arch/arm/src/common/gnu/arm_signal_handler.S 35: unknown instruction
  .syntax unified
--^

[asarm] (error #2067) /home/guoshichao/work_profile/vela_os/vela_car_6/nuttx/arch/arm/src/common/gnu/arm_signal_handler.S 70: unknown instruction
  .thumb_func
--^

[asarm] (error #2230) /home/guoshichao/work_profile/vela_os/vela_car_6/nuttx/arch/arm/src/common/gnu/arm_signal_handler.S 72: bad directive
  .type up_signal_handler , function
----------------------------^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-26 23:15:07 +08:00
chao an
a04e44ea75 syslog/channel: move syslog channel map into rodata
add SYSLOG_REGISTER to support disable syslog channel register

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-26 16:10:29 +08:00
chao an
9abe737ef3 syslog/channel: add constant attribute if SYSLOG_IOCTL is not enabled
move all private channel define from data to rodata

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-26 16:10:29 +08:00
adriendesp
6d72a8d676 [arch/xmc4] added register description for ERU and POSIF peripherals
Register map of ERU and POSIF peripherals, from the Ref. Manuals for both XMC45 and XMC4[7-8]
2024-09-25 19:05:12 -03:00
hujun5
efdb4322fc arm: we should use tcb->xcp.regs instead of up_current_regs() as the basis for judging whether to call restore_critical_section.
This commit fixes the regression from https://github.com/apache/nuttx/pull/13444

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-25 17:10:14 +09:00
chao an
542e2ba625 CMake/preprocess: fix typo PREPROCES -> PREPROCESS
correct the marco define from PREPROCES to PREPROCESS

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-25 11:55:06 +08:00
hujun5
c9bdb598b7 irq: use up_interrupt_context to replace up_current_regs
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-25 08:58:20 +08:00
hujun5
349268a536 arm: tc32 nested interrupts are not supported
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-25 08:58:20 +08:00
hujun5
4972a8e02e arm: g_current_regs is only used to determine if we are in irq,
with other functionalities removed.

reason:
by doing this we can reduce context switch time,
When we exit from an interrupt handler, we directly use tcb->xcp.regs

before
size nuttx
   text    data     bss     dec     hex filename
 225920     409   30925  257254   3ece6 nuttx

after
   text    data     bss     dec     hex filename
 225604     409   30925  256938   3ebaa nuttx

 szie change -316

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-25 08:58:20 +08:00
chao an
a5251161c6 syslog/channel: rename syslog_channel() to syslog_channel_register()
Change syslog API naming more reasonable:

1. rename syslog_channel() to syslog_channel_register()
2. rename syslog_channel_remove() to syslog_channel_unregister()

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-24 19:28:49 +08:00
Tim Hardisty
5a4d31f315 SAMA5 sam_mcan.c unitialized variable 2024-09-23 10:13:29 -03:00
chenrun1
ab4d72756e arch/samd2l2:Ignore atomic warning when using clang compiler
When the toolchain does not support atomic, it will use the version implemented by NuttX (low performance version). This scenario is consistent with the original design, so we can ignore it.

see bug here:
https://bugs.llvm.org/show_bug.cgi?id=43603

Error: inode/fs_inodeaddref.c:50:7: error: large atomic operation may incur significant performance penalty; the access size (4 bytes) exceeds the max lock-free size (0  bytes) [-Werror,-Watomic-alignment]
   50 |       atomic_fetch_add(&inode->i_crefs, 1);
      |       ^
/tools/clang-arm-none-eabi/lib/clang/17/include/stdatomic.h:152:43: note: expanded from macro 'atomic_fetch_add'
  152 | #define atomic_fetch_add(object, operand) __c11_atomic_fetch_add(object, operand, __ATOMIC_SEQ_CST)
      |                                           ^
1 error generated.
make[1]: *** [Makefile:83: fs_inodeaddref.o] Error 1
Error: inode/fs_inodefind.c:74:7: error: large atomic operation may incur significant performance penalty; the access size (4 bytes) exceeds the max lock-free size (0  bytes) [-Werror,-Watomic-alignment]
   74 |       atomic_fetch_add(&node->i_crefs, 1);

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-09-23 14:07:03 +08:00
chenrun1
4cec713dbf fs_inode:Change the type of i_crefs to atomic_int
Summary:
  1.Modified the i_crefs from int16_t to atomic_int
  2.Modified the i_crefs add, delete, read, and initialize interfaces to atomic operations
The purpose of this change is to avoid deadlock in cross-core scenarios, where A Core blocks B Core’s request for a write operation to A Core when A Core requests a read operation to B Core.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-09-23 14:07:03 +08:00
wangmingrong1
469418f3c9 mm/kasan: Kasan global support setting alignment length
1. Similar to asan, supports single byte out of bounds detection
2. Fix the script to address the issue of not supporting the big end

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-09-20 21:47:23 +08:00
wangjianyu3
b14b15ac2d nrf91: Update GPS to GNSS
Related: 03f4ec7765

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-20 14:38:43 +08:00
chao an
b82717b9e6 arm/cortex-a,r: replace cp15 instruct to macros to align operation
This is continue work of https://github.com/apache/nuttx/pull/13486

Discussion here:
https://github.com/apache/nuttx/pull/13486#discussion_r1764354675

1. move cp15.h to arch public
2. replace cp15 instruct to macros to align operation
3. add memory barrier to avoid compiler optimization

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-20 09:29:57 +08:00
Petro Karashchenko
f0267bc507 arch/arm/samv7: add support of SocketLIN interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-09-19 09:39:54 +08:00
hujun5
0561b55860 arm: optimize up_interrupt_context used in armv[6/7/8]-m
resson:
using percpu storage for g_current_regs or leveraging interrupt status
registers to determine if code is running within an interrupt context can enhance performance.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5
6a3a32b185 arch: move up_interrupt_context to arch specific irq.h
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5
a754c517cc irq: use per-cpu reg to replace g_current_regs
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
Xiang Xiao
f76c2ed83b can: Add g_ prefix to can_dlc_to_len and len_to_can_dlc.
detail: Add g_ prefix to can_dlc_to_len and len_to_can_dlc to
follow NuttX coding style conventions for global symbols,
improving code readability and maintainability.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-09-18 23:50:11 +08:00
wanggang26
ae95623b8d arm_addrenv:fix app crash when enable shm in kernel mode
Hello, World!!
ap> [    2.566000] [ 1] arm_addrenv_destroy_region: listlen=1
vaddr=80000000
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000,
gatidx:0x8, priv->gat[gatidx]:0xffffffff granno:0x110 [mem:0x48110000
free_size:0x1000]
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000,
gatidx:0x8, priv->gat[gatidx]:0xfffeffff granno:0x10f [mem:0x4810f000
free_size:0x1000]
[    2.567000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80100000
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000,
gatidx:0x8, priv->gat[gatidx]:0xfffe7fff granno:0x112 [mem:0x48112000
free_size:0x1000]
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000,
gatidx:0x8, priv->gat[gatidx]:0xfffa7fff granno:0x111 [mem:0x48111000
free_size:0x1000]
[    2.568000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80200000
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x100000,
gatidx:0x8, priv->gat[gatidx]:0xfff87fff granno:0x114 [mem:0x48114000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x200000,
gatidx:0x8, priv->gat[gatidx]:0xffe87fff granno:0x115 [mem:0x48115000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x400000,
gatidx:0x8, priv->gat[gatidx]:0xffc87fff granno:0x116 [mem:0x48116000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x800000,
gatidx:0x8, priv->gat[gatidx]:0xff887fff granno:0x117 [mem:0x48117000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x1000000,
gatidx:0x8, priv->gat[gatidx]:0xff087fff granno:0x118 [mem:0x48118000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x2000000,
gatidx:0x8, priv->gat[gatidx]:0xfe087fff granno:0x119 [mem:0x48119000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x4000000,
gatidx:0x8, priv->gat[gatidx]:0xfc087fff granno:0x11a [mem:0x4811a000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000000,
gatidx:0x8, priv->gat[gatidx]:0xf8087fff granno:0x11b [mem:0x4811b000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000000,
gatidx:0x8, priv->gat[gatidx]:0xf0087fff granno:0x11c [mem:0x4811c000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000000,
gatidx:0x8, priv->gat[gatidx]:0xe0087fff granno:0x11d [mem:0x4811d000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000000,
gatidx:0x8, priv->gat[gatidx]:0xc0087fff granno:0x11e [mem:0x4811e000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000000,
gatidx:0x8, priv->gat[gatidx]:0x80087fff granno:0x11f [mem:0x4811f000
free_size:0x1000]
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x87fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.574000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80300000
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x7fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.575000] [ 1] _assert: Current Version: NuttX  0.0.0
fa1e301238-dirty Apr 16 2024 23:18:10 arm
[    2.575000] [ 1] _assert: Assertion failed : at file:
mm_gran/mm_granfree.c:131 task: lpwork process: Kernel 0x602769

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 15:26:42 -03:00
simbit18
583f025422 Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
2024-09-17 22:16:41 +08:00
SPRESENSE
237087f61a arch: cxd56xx: Fix issue by update of inode reference
Fix an issue of driver open failure caused by the following commit
that changes the initial value of inode reference.

43d0d95f81 fs/inode: using inode reference to indicate unlink and simply code
2024-09-17 20:13:15 +08:00
wanggang26
a6c3de6e89 goldfish:add kernel mode support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 20:10:13 +08:00